Tim Northover 9530f416eb ARM: align loops to 4 bytes on Cortex-M3 and Cortex-M4. ... The Technical Reference Manuals for these two CPUs state that branching to an unaligned 32-bit instruction incurs an extra pipeline reload penalty. That's bad. This also enables the optimization at -Os since it costs on average one byte per loop in return for 1 cycle per iteration, which is pretty good going. llvm-svn: 342127		2018-09-13 10:28:05 +00:00
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llvm	ARM: align loops to 4 bytes on Cortex-M3 and Cortex-M4.	2018-09-13 10:28:05 +00:00
llvm-c	[Aggressive InstCombine] Move C bindings to their own header file.	2018-09-05 11:41:12 +00:00