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2a64d462d9
llvm-svn: 17278
44 lines
1.5 KiB
C++
44 lines
1.5 KiB
C++
//===- MRegisterInfo.cpp - Target Register Information Implementation -----===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the MRegisterInfo interface.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Target/MRegisterInfo.h"
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namespace llvm {
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MRegisterInfo::MRegisterInfo(const MRegisterDesc *D, unsigned NR,
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regclass_iterator RCB, regclass_iterator RCE,
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int CFSO, int CFDO)
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: Desc(D), NumRegs(NR), RegClassBegin(RCB), RegClassEnd(RCE) {
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assert(NumRegs < FirstVirtualRegister &&
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"Target has too many physical registers!");
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CallFrameSetupOpcode = CFSO;
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CallFrameDestroyOpcode = CFDO;
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}
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MRegisterInfo::~MRegisterInfo() {}
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std::vector<bool> MRegisterInfo::getAllocatableSet(MachineFunction &MF) const {
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std::vector<bool> Allocatable(NumRegs);
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for (MRegisterInfo::regclass_iterator I = regclass_begin(),
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E = regclass_end(); I != E; ++I) {
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const TargetRegisterClass *RC = *I;
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for (TargetRegisterClass::iterator I = RC->allocation_order_begin(MF),
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E = RC->allocation_order_end(MF); I != E; ++I)
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Allocatable[*I] = true;
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}
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return Allocatable;
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}
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} // End llvm namespace
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