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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-30 15:32:52 +01:00
llvm-mirror/test/CodeGen
Benjamin Kramer 95a2f42a75 X86: Shrink certain forms of movsx.
In particular:
movsbw %al, %ax   --> cbtw
movswl %ax, %eax  --> cwtl
movslq %eax, %rax --> cltq

According to Intel's manual those have the same performance characteristics but
come with a smaller encoding.

llvm-svn: 186174
2013-07-12 18:06:44 +00:00
..
AArch64 Start using CHECK-LABEL in some tests. 2013-07-12 14:54:12 +00:00
ARM Start using CHECK-LABEL in some tests. 2013-07-12 14:54:12 +00:00
CPP test commit: remove blank line. 2013-03-14 05:43:59 +00:00
Generic Debug Info: clean up usage of Verify. 2013-06-28 05:43:10 +00:00
Hexagon Hexagon: Pass to replace tranfer/copy instructions into combine instruction 2013-05-14 18:54:06 +00:00
Inputs Revert "Adding DIImportedModules to DIScopes." 2013-03-28 02:44:59 +00:00
MBlaze Remove unnecessary leading comment characters in lit-only file 2013-03-18 22:08:16 +00:00
Mips [mips] Fix test case to check that mips64 instructions are generated. 2013-07-01 20:18:58 +00:00
MSP430 Really fix the test. Sorry for the breakage... 2013-07-01 19:51:36 +00:00
NVPTX [NVPTX] Add support for module-scope inline asm 2013-07-01 13:00:14 +00:00
PowerPC Start using CHECK-LABEL in some tests. 2013-07-12 14:54:12 +00:00
R600 R600/SI: Initial local memory support 2013-07-10 16:37:07 +00:00
SI
SPARC Switch spill weights from a basic loop depth estimation to BlockFrequencyInfo. 2013-06-17 19:00:36 +00:00
SystemZ [SystemZ] Add test missing from r186148 2013-07-12 09:20:14 +00:00
Thumb LocalStackSlotAllocation improvements 2013-04-30 20:04:37 +00:00
Thumb2 ARM: Fix incorrect pack pattern for thumb2 2013-07-09 22:59:22 +00:00
X86 X86: Shrink certain forms of movsx. 2013-07-12 18:06:44 +00:00
XCore [XCore] Add ISel pattern for LDWCP 2013-07-03 07:48:50 +00:00