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0eb872067d
This re-applies r268760, reverted in r268794. Fixes http://llvm.org/PR27670 The original imp-defs assertion was way overzealous: forward all implicit operands, except imp-defs of the new super-reg def (r268787 for GR64, but also possible for GR16->GR32), or imp-uses of the new super-reg use. While there, mark the source use as Undef, and add an imp-use of the old source reg: that should cover any case of dead super-regs. At the stage the pass runs, flags are unlikely to matter anyway; still, let's be as correct as possible. Also add MIR tests for the various interesting cases. Original commit message: Codesize is less (16) or equal (8), and we avoid partial dependencies. Differential Revision: http://reviews.llvm.org/D19999 llvm-svn: 268831
149 lines
4.8 KiB
LLVM
149 lines
4.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
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define <16 x i32> @select00(i32 %a, <16 x i32> %b) nounwind {
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; CHECK-LABEL: select00:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vpxord %zmm1, %zmm1, %zmm1
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; CHECK-NEXT: cmpl $255, %edi
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; CHECK-NEXT: je LBB0_2
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; CHECK-NEXT: ## BB#1:
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; CHECK-NEXT: vmovaps %zmm0, %zmm1
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; CHECK-NEXT: LBB0_2:
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; CHECK-NEXT: vpxord %zmm1, %zmm0, %zmm0
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; CHECK-NEXT: retq
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%cmpres = icmp eq i32 %a, 255
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%selres = select i1 %cmpres, <16 x i32> zeroinitializer, <16 x i32> %b
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%res = xor <16 x i32> %b, %selres
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ret <16 x i32> %res
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}
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define <8 x i64> @select01(i32 %a, <8 x i64> %b) nounwind {
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; CHECK-LABEL: select01:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vpxord %zmm1, %zmm1, %zmm1
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; CHECK-NEXT: cmpl $255, %edi
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; CHECK-NEXT: je LBB1_2
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; CHECK-NEXT: ## BB#1:
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; CHECK-NEXT: vmovaps %zmm0, %zmm1
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; CHECK-NEXT: LBB1_2:
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; CHECK-NEXT: vpxorq %zmm1, %zmm0, %zmm0
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; CHECK-NEXT: retq
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%cmpres = icmp eq i32 %a, 255
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%selres = select i1 %cmpres, <8 x i64> zeroinitializer, <8 x i64> %b
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%res = xor <8 x i64> %b, %selres
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ret <8 x i64> %res
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}
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define float @select02(float %a, float %b, float %c, float %eps) {
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; CHECK-LABEL: select02:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vcmpless %xmm0, %xmm3, %k1
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; CHECK-NEXT: vmovss %xmm2, %xmm0, %xmm1 {%k1}
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; CHECK-NEXT: vmovaps %zmm1, %zmm0
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; CHECK-NEXT: retq
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%cmp = fcmp oge float %a, %eps
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%cond = select i1 %cmp, float %c, float %b
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ret float %cond
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}
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define double @select03(double %a, double %b, double %c, double %eps) {
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; CHECK-LABEL: select03:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vcmplesd %xmm0, %xmm3, %k1
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; CHECK-NEXT: vmovsd %xmm2, %xmm0, %xmm1 {%k1}
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; CHECK-NEXT: vmovaps %zmm1, %zmm0
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; CHECK-NEXT: retq
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%cmp = fcmp oge double %a, %eps
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%cond = select i1 %cmp, double %c, double %b
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ret double %cond
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}
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define <16 x double> @select04(<16 x double> %a, <16 x double> %b) {
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; CHECK-LABEL: select04:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vmovaps %zmm3, %zmm1
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; CHECK-NEXT: retq
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%sel = select <16 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false>, <16 x double> %a, <16 x double> %b
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ret <16 x double> %sel
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}
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define i8 @select05(i8 %a.0, i8 %m) {
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; CHECK-LABEL: select05:
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; CHECK: ## BB#0:
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; CHECK-NEXT: orl %esi, %edi
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: retq
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%mask = bitcast i8 %m to <8 x i1>
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%a = bitcast i8 %a.0 to <8 x i1>
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%r = select <8 x i1> %mask, <8 x i1> <i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1>, <8 x i1> %a
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%res = bitcast <8 x i1> %r to i8
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ret i8 %res;
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}
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define i8 @select05_mem(<8 x i1>* %a.0, <8 x i1>* %m) {
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; CHECK-LABEL: select05_mem:
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; CHECK: ## BB#0:
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; CHECK-NEXT: movzbw (%rsi), %ax
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; CHECK-NEXT: kmovw %eax, %k0
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; CHECK-NEXT: movzbw (%rdi), %ax
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; CHECK-NEXT: kmovw %eax, %k1
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; CHECK-NEXT: korw %k1, %k0, %k0
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; CHECK-NEXT: kmovw %k0, %eax
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; CHECK-NEXT: retq
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%mask = load <8 x i1> , <8 x i1>* %m
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%a = load <8 x i1> , <8 x i1>* %a.0
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%r = select <8 x i1> %mask, <8 x i1> <i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1>, <8 x i1> %a
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%res = bitcast <8 x i1> %r to i8
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ret i8 %res;
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}
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define i8 @select06(i8 %a.0, i8 %m) {
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; CHECK-LABEL: select06:
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; CHECK: ## BB#0:
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; CHECK-NEXT: andl %esi, %edi
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: retq
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%mask = bitcast i8 %m to <8 x i1>
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%a = bitcast i8 %a.0 to <8 x i1>
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%r = select <8 x i1> %mask, <8 x i1> %a, <8 x i1> zeroinitializer
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%res = bitcast <8 x i1> %r to i8
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ret i8 %res;
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}
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define i8 @select06_mem(<8 x i1>* %a.0, <8 x i1>* %m) {
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; CHECK-LABEL: select06_mem:
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; CHECK: ## BB#0:
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; CHECK-NEXT: movzbw (%rsi), %ax
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; CHECK-NEXT: kmovw %eax, %k0
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; CHECK-NEXT: movzbw (%rdi), %ax
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; CHECK-NEXT: kmovw %eax, %k1
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; CHECK-NEXT: kandw %k1, %k0, %k0
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; CHECK-NEXT: kmovw %k0, %eax
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; CHECK-NEXT: retq
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%mask = load <8 x i1> , <8 x i1>* %m
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%a = load <8 x i1> , <8 x i1>* %a.0
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%r = select <8 x i1> %mask, <8 x i1> %a, <8 x i1> zeroinitializer
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%res = bitcast <8 x i1> %r to i8
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ret i8 %res;
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}
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define i8 @select07(i8 %a.0, i8 %b.0, i8 %m) {
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; CHECK-LABEL: select07:
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; CHECK: ## BB#0:
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; CHECK-NEXT: kmovw %edx, %k0
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; CHECK-NEXT: kmovw %edi, %k1
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; CHECK-NEXT: kmovw %esi, %k2
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; CHECK-NEXT: kandw %k0, %k1, %k1
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; CHECK-NEXT: knotw %k0, %k0
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; CHECK-NEXT: kandw %k0, %k2, %k0
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; CHECK-NEXT: korw %k0, %k1, %k0
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; CHECK-NEXT: kmovw %k0, %eax
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; CHECK-NEXT: retq
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%mask = bitcast i8 %m to <8 x i1>
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%a = bitcast i8 %a.0 to <8 x i1>
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%b = bitcast i8 %b.0 to <8 x i1>
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%r = select <8 x i1> %mask, <8 x i1> %a, <8 x i1> %b
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%res = bitcast <8 x i1> %r to i8
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ret i8 %res;
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}
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