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llvm-mirror/test/CodeGen/X86/pr27591.ll
David Majnemer a2740cd234 [X86] Lower zext i1 arguments
i1 is now a legal type for X86 with AVX512.
There were some paths in X86FastISel which were not quite ready to see
an i1 value: they were not quite sure how to deal with sign/zero extends
for call arguments.
DTRT by extending to i8 for zeroext and bailing out of FastISel for
signext.

This fixes PR27591.

llvm-svn: 268470
2016-05-04 00:22:23 +00:00

43 lines
1.0 KiB
LLVM

; RUN: llc -o - -O0 < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
define void @test1(i32 %x) #0 {
entry:
%tobool = icmp ne i32 %x, 0
call void @callee1(i1 zeroext %tobool)
ret void
}
; CHECK-LABEL: test1:
; CHECK: cmpl $0, %edi
; CHECK-NEXT: setne %al
; CHECK-NEXT: andb $1, %al
; CHECK-NEXT: movzbl %al, %edi
; CHECK-NEXT: callq callee1
define void @test2(i32 %x) #0 {
entry:
%tobool = icmp ne i32 %x, 0
call void @callee2(i1 signext %tobool)
ret void
}
; CHECK-LABEL: test2:
; CHECK: cmpl $0, %edi
; CHECK-NEXT: setne %al
; CHECK-NEXT: kmovb %eax, %k0
; CHECK-NEXT: kmovw %k0, %edi
; CHECK-NEXT: andl $1, %edi
; CHECK-NEXT: movb %dil, %al
; CHECK-NEXT: xorl %edi, %edi
; CHECK-NEXT: testb %al, %al
; CHECK-NEXT: movl $-1, %ecx
; CHECK-NEXT: cmovnel %ecx, %edi
; CHECK-NEXT: callq callee2
declare void @callee1(i1 zeroext)
declare void @callee2(i1 signext)
attributes #0 = { nounwind "target-cpu"="skylake-avx512" }