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838c618b88
This patches removes the x86.sse41.pmovsx* intrinsics, provides a suitable upgrade path and updates relevant tests to sign extend a subvector instead. LLVM counterpart to D12835 Differential Revision: http://reviews.llvm.org/D13002 llvm-svn: 248368
107 lines
4.0 KiB
LLVM
107 lines
4.0 KiB
LLVM
; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=-avx,+sse4.1 | FileCheck %s
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; This test works just like the non-upgrade one except that it only checks
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; forms which require auto-upgrading.
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define <2 x double> @test_x86_sse41_blendpd(<2 x double> %a0, <2 x double> %a1) {
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; CHECK: blendpd
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%res = call <2 x double> @llvm.x86.sse41.blendpd(<2 x double> %a0, <2 x double> %a1, i32 7) ; <<2 x double>> [#uses=1]
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ret <2 x double> %res
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}
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declare <2 x double> @llvm.x86.sse41.blendpd(<2 x double>, <2 x double>, i32) nounwind readnone
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define <4 x float> @test_x86_sse41_blendps(<4 x float> %a0, <4 x float> %a1) {
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; CHECK: blendps
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%res = call <4 x float> @llvm.x86.sse41.blendps(<4 x float> %a0, <4 x float> %a1, i32 7) ; <<4 x float>> [#uses=1]
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ret <4 x float> %res
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}
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declare <4 x float> @llvm.x86.sse41.blendps(<4 x float>, <4 x float>, i32) nounwind readnone
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define <2 x double> @test_x86_sse41_dppd(<2 x double> %a0, <2 x double> %a1) {
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; CHECK: dppd
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%res = call <2 x double> @llvm.x86.sse41.dppd(<2 x double> %a0, <2 x double> %a1, i32 7) ; <<2 x double>> [#uses=1]
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ret <2 x double> %res
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}
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declare <2 x double> @llvm.x86.sse41.dppd(<2 x double>, <2 x double>, i32) nounwind readnone
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define <4 x float> @test_x86_sse41_dpps(<4 x float> %a0, <4 x float> %a1) {
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; CHECK: dpps
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%res = call <4 x float> @llvm.x86.sse41.dpps(<4 x float> %a0, <4 x float> %a1, i32 7) ; <<4 x float>> [#uses=1]
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ret <4 x float> %res
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}
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declare <4 x float> @llvm.x86.sse41.dpps(<4 x float>, <4 x float>, i32) nounwind readnone
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define <4 x float> @test_x86_sse41_insertps(<4 x float> %a0, <4 x float> %a1) {
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; CHECK: insertps
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%res = call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %a0, <4 x float> %a1, i32 7) ; <<4 x float>> [#uses=1]
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ret <4 x float> %res
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}
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declare <4 x float> @llvm.x86.sse41.insertps(<4 x float>, <4 x float>, i32) nounwind readnone
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define <8 x i16> @test_x86_sse41_mpsadbw(<16 x i8> %a0, <16 x i8> %a1) {
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; CHECK: mpsadbw
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%res = call <8 x i16> @llvm.x86.sse41.mpsadbw(<16 x i8> %a0, <16 x i8> %a1, i32 7) ; <<8 x i16>> [#uses=1]
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ret <8 x i16> %res
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}
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declare <8 x i16> @llvm.x86.sse41.mpsadbw(<16 x i8>, <16 x i8>, i32) nounwind readnone
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define <8 x i16> @test_x86_sse41_pblendw(<8 x i16> %a0, <8 x i16> %a1) {
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; CHECK: pblendw
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%res = call <8 x i16> @llvm.x86.sse41.pblendw(<8 x i16> %a0, <8 x i16> %a1, i32 7) ; <<8 x i16>> [#uses=1]
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ret <8 x i16> %res
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}
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declare <8 x i16> @llvm.x86.sse41.pblendw(<8 x i16>, <8 x i16>, i32) nounwind readnone
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define <4 x i32> @test_x86_sse41_pmovsxbd(<16 x i8> %a0) {
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; CHECK: pmovsxbd
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%res = call <4 x i32> @llvm.x86.sse41.pmovsxbd(<16 x i8> %a0) ; <<4 x i32>> [#uses=1]
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ret <4 x i32> %res
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}
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declare <4 x i32> @llvm.x86.sse41.pmovsxbd(<16 x i8>) nounwind readnone
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define <2 x i64> @test_x86_sse41_pmovsxbq(<16 x i8> %a0) {
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; CHECK: pmovsxbq
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%res = call <2 x i64> @llvm.x86.sse41.pmovsxbq(<16 x i8> %a0) ; <<2 x i64>> [#uses=1]
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ret <2 x i64> %res
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}
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declare <2 x i64> @llvm.x86.sse41.pmovsxbq(<16 x i8>) nounwind readnone
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define <8 x i16> @test_x86_sse41_pmovsxbw(<16 x i8> %a0) {
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; CHECK: pmovsxbw
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%res = call <8 x i16> @llvm.x86.sse41.pmovsxbw(<16 x i8> %a0) ; <<8 x i16>> [#uses=1]
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ret <8 x i16> %res
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}
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declare <8 x i16> @llvm.x86.sse41.pmovsxbw(<16 x i8>) nounwind readnone
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define <2 x i64> @test_x86_sse41_pmovsxdq(<4 x i32> %a0) {
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; CHECK: pmovsxdq
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%res = call <2 x i64> @llvm.x86.sse41.pmovsxdq(<4 x i32> %a0) ; <<2 x i64>> [#uses=1]
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ret <2 x i64> %res
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}
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declare <2 x i64> @llvm.x86.sse41.pmovsxdq(<4 x i32>) nounwind readnone
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define <4 x i32> @test_x86_sse41_pmovsxwd(<8 x i16> %a0) {
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; CHECK: pmovsxwd
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%res = call <4 x i32> @llvm.x86.sse41.pmovsxwd(<8 x i16> %a0) ; <<4 x i32>> [#uses=1]
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ret <4 x i32> %res
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}
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declare <4 x i32> @llvm.x86.sse41.pmovsxwd(<8 x i16>) nounwind readnone
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define <2 x i64> @test_x86_sse41_pmovsxwq(<8 x i16> %a0) {
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; CHECK: pmovsxwq
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%res = call <2 x i64> @llvm.x86.sse41.pmovsxwq(<8 x i16> %a0) ; <<2 x i64>> [#uses=1]
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ret <2 x i64> %res
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}
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declare <2 x i64> @llvm.x86.sse41.pmovsxwq(<8 x i16>) nounwind readnone
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