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f61cc3256e
We need to clean up the DAG floating-point undef logic. This process is similar to how we handled integer undef logic in D43141. And as we did there, I'm trying to reduce the patch by changing tests that would probably become meaningless once we correct FP undef folding. llvm-svn: 332550
89 lines
3.3 KiB
LLVM
89 lines
3.3 KiB
LLVM
; RUN: llc -O2 -march=hexagon -fp-contract=fast -pipeliner-prune-loop-carried=false < %s | FileCheck %s
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; Test that there is 1 packet between the FP result and its use.
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; CHECK: loop0([[LOOP0:.LBB[0-9_]+]],
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; CHECK: [[LOOP0]]
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; CHECK: [[REG0:(r[0-9]+)]] += sfmpy(r{{[0-9]+}},r{{[0-9]+}})
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; CHECK: }
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; CHECK: }
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; CHECK: r{{[0-9]+}} = {{.*}}[[REG0]]
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; Function Attrs: nounwind readnone
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define void @f0(i32 %a0, i32 %a1) #0 {
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b0:
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%v0 = alloca [1000 x float], align 64
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%v1 = alloca [1000 x float], align 64
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%v2 = alloca [1000 x float], align 64
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%v3 = alloca [1000 x float], align 64
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%v4 = bitcast [1000 x float]* %v0 to i8*
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call void @llvm.lifetime.start.p0i8(i64 4000, i8* %v4) #2
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%v5 = bitcast [1000 x float]* %v1 to i8*
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call void @llvm.lifetime.start.p0i8(i64 4000, i8* %v5) #2
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%v6 = bitcast [1000 x float]* %v2 to i8*
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call void @llvm.lifetime.start.p0i8(i64 4000, i8* %v6) #2
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%v7 = bitcast [1000 x float]* %v3 to i8*
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call void @llvm.lifetime.start.p0i8(i64 4000, i8* %v7) #2
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%v8 = icmp sgt i32 %a1, 0
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%v9 = add i32 %a1, -1
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%v10 = getelementptr [1000 x float], [1000 x float]* %v3, i32 0, i32 0
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br label %b1
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b1: ; preds = %b3, %b0
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%v11 = phi i32 [ 0, %b0 ], [ %v34, %b3 ]
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br i1 %v8, label %b2, label %b3
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b2: ; preds = %b2, %b1
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%v12 = phi float* [ %v33, %b2 ], [ %v10, %b1 ]
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%v13 = phi i32 [ %v31, %b2 ], [ 0, %b1 ]
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%v14 = mul nsw i32 %v13, %a1
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%v15 = add nsw i32 %v14, %v11
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%v16 = getelementptr inbounds [1000 x float], [1000 x float]* %v1, i32 0, i32 %v15
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%v17 = load float, float* %v16, align 4, !tbaa !0
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%v18 = fmul float %v17, %v17
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%v19 = mul nsw i32 %v13, 25
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%v20 = add nsw i32 %v19, %v11
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%v21 = getelementptr inbounds [1000 x float], [1000 x float]* %v2, i32 0, i32 %v20
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%v22 = load float, float* %v21, align 4, !tbaa !0
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%v23 = fmul float %v22, %v22
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%v24 = fadd float %v18, %v23
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%v25 = load float, float* %v12, align 4, !tbaa !0
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%v26 = fmul float %v25, %v25
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%v27 = fadd float %v24, %v26
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%v28 = getelementptr inbounds [1000 x float], [1000 x float]* %v0, i32 0, i32 %v20
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%v29 = load float, float* %v28, align 4, !tbaa !0
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%v30 = fadd float %v29, %v27
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store float %v30, float* %v28, align 4, !tbaa !0
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%v31 = add nuw nsw i32 %v13, 1
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%v32 = icmp eq i32 %v13, %v9
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%v33 = getelementptr float, float* %v12, i32 1
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br i1 %v32, label %b3, label %b2
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b3: ; preds = %b2, %b1
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%v34 = add nuw nsw i32 %v11, 1
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%v35 = icmp eq i32 %v34, 25
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br i1 %v35, label %b4, label %b1
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b4: ; preds = %b3
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call void @llvm.lifetime.end.p0i8(i64 4000, i8* %v7) #2
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call void @llvm.lifetime.end.p0i8(i64 4000, i8* %v6) #2
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call void @llvm.lifetime.end.p0i8(i64 4000, i8* %v5) #2
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call void @llvm.lifetime.end.p0i8(i64 4000, i8* %v4) #2
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ret void
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}
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; Function Attrs: argmemonly nounwind
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declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture) #1
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; Function Attrs: argmemonly nounwind
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declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) #1
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attributes #0 = { nounwind readnone "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length64b" }
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attributes #1 = { argmemonly nounwind }
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attributes #2 = { nounwind }
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!0 = !{!1, !1, i64 0}
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!1 = !{!"float", !2, i64 0}
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!2 = !{!"omnipotent char", !3, i64 0}
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!3 = !{!"Simple C/C++ TBAA"}
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