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llvm-mirror/test/CodeGen/NVPTX
Sanjay Patel 6ca90c97f9 [DAG] fold FP binops with undef operands to NaN
This is the FP sibling of D43141 with the corresponding IR change in rL327212.

We can't propagate undef here because if a variable operand is a NaN, these 
binops must propagate NaN. Neither global nor node-level fast-math makes a 
difference. If we have 'nnan', I think later folds can turn the NaN into undef.

The tests in X86/fp-undef.ll are meant to be the definitive verification for 
these folds - everything reduces identically now.

The other test changes are collateral damage. They may need to be altered to
preserve their intent.

Differential Revision: https://reviews.llvm.org/D47026

llvm-svn: 332920
2018-05-21 23:54:19 +00:00
..
access-non-generic.ll [NVPTX] Use addrspacecast instead of target-specific intrinsics in NVPTXGenericToNVVM. 2018-02-28 23:57:48 +00:00
add-128bit.ll
addrspacecast-gvar.ll
addrspacecast.ll [NVPTX] Added a feature to use short pointers for const/local/shared AS. 2018-05-09 23:46:19 +00:00
aggr-param.ll
aggregate-return.ll
alias.ll
annotations.ll
arg-lowering.ll
arithmetic-fp-sm20.ll
arithmetic-int.ll
atomics-sm60.ll [NVPTX] Implement __nvvm_atom_add_gen_d builtin. 2017-11-07 22:10:54 +00:00
atomics-with-scope.ll
atomics.ll
barrier.ll
bfe.ll
branch-fold.ll
bug17709.ll
bug21465.ll
bug22246.ll
bug22322.ll
bug26185-2.ll
bug26185.ll
bypass-div.ll
call-with-alloca-buffer.ll
callchain.ll
calling-conv.ll
combine-min-max.ll
compare-int.ll
constant-vectors.ll
convergent-mir-call.ll
convert-fp.ll
convert-int-sm20.ll
ctlz.ll
ctpop.ll
cttz.ll
disable-opt.ll
div-ri.ll
divrem-combine.ll
envreg.ll
extloadv.ll
f16-instructions.ll
f16x2-instructions.ll [NVPTX] Make the legalizer expand shufflevector of <2 x half> 2018-04-26 15:26:29 +00:00
fast-math.ll
fcos-no-fast-math.ll
fma-assoc.ll
fma-disable.ll
fma.ll
fns.ll [NVPTX,CUDA] Added llvm.nvvm.fns intrinsic and matching __nvvm_fns builtin in clang. 2017-12-06 17:50:05 +00:00
fp16.ll
fp-contract.ll
fp-literals.ll
fsin-no-fast-math.ll
function-align.ll
generic-to-nvvm-ir.ll [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
generic-to-nvvm.ll [NVPTX] Use addrspacecast instead of target-specific intrinsics in NVPTXGenericToNVVM. 2018-02-28 23:57:48 +00:00
global-addrspace.ll
global-ctor-empty.ll
global-ctor.ll
global-dtor.ll
global-ordering.ll
global-variable-big.ll
global-visibility.ll
globals_init.ll
globals_lowering.ll
gvar-init.ll
half.ll [NVPTX] add support for initializing fp16 arrays. 2018-04-06 22:25:08 +00:00
i1-global.ll
i1-int-to-fp.ll
i1-param.ll
i8-param.ll
i128-global.ll
i128-param.ll
i128-retval.ll
idioms.ll
imad.ll
inline-asm.ll
intrin-nocapture.ll
intrinsic-old.ll
intrinsics.ll
isspacep.ll
ld-addrspace.ll [NVPTX] Added a feature to use short pointers for const/local/shared AS. 2018-05-09 23:46:19 +00:00
ld-generic.ll
ld-st-addrrspace.py
ldg-invariant.ll [NVPTX] Fixed vectorized LDG for f16. 2018-04-06 21:10:24 +00:00
ldparam-v4.ll
ldu-i8.ll
ldu-ldg.ll
ldu-reg-plus-offset.ll
lit.local.cfg
load-sext-i1.ll
load-with-non-coherent-cache.ll
LoadStoreVectorizer.ll
local-stack-frame.ll
loop-vectorize.ll
lower-aggr-copies.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
lower-alloca.ll
lower-kernel-ptr-arg.ll
machine-sink.ll
MachineSink-call.ll
MachineSink-convergent.ll
managed.ll
match.ll
math-intrins.ll
minmax-negative.ll Improve clamp recognition in ValueTracking. 2017-10-27 20:53:41 +00:00
misaligned-vector-ldst.ll
module-inline-asm.ll
mulwide.ll
named-barriers.ll
noduplicate-syncthreads.ll
nounroll.ll
nvcl-param-align.ll
nvvm-reflect-module-flag.ll
nvvm-reflect.ll
param-align.ll
param-load-store.ll [DAGCombiner] When combining zero_extend of a truncate, only mask before extending for vectors. 2018-03-01 22:32:25 +00:00
pr13291-i1-store.ll
pr16278.ll
pr17529.ll
read-global-variable-constant.ll [NVPTX] Lower loads from global constants using ld.global.nc (aka LDG). 2018-02-28 23:58:05 +00:00
refl1.ll
reg-copy.ll
reg-types.ll
rotate.ll
sched1.ll
sched2.ll
sext-in-reg.ll
sext-params.ll
shfl-sync.ll
shfl.ll
shift-parts.ll
simple-call.ll
sm-version-20.ll
sm-version-21.ll
sm-version-30.ll
sm-version-32.ll
sm-version-35.ll
sm-version-37.ll
sm-version-50.ll
sm-version-52.ll
sm-version-53.ll
sm-version-60.ll
sm-version-61.ll
sm-version-62.ll
sm-version-70.ll
speculative-execution-divergent-target.ll
sqrt-approx.ll
st-addrspace.ll [NVPTX] Added a feature to use short pointers for const/local/shared AS. 2018-05-09 23:46:19 +00:00
st-generic.ll
surf-read-cuda.ll
surf-read.ll
surf-write-cuda.ll
surf-write.ll
symbol-naming.ll [NVPTX] Assign valid global names 2017-12-04 14:19:33 +00:00
TailDuplication-convergent.ll
tex-read-cuda.ll
tex-read.ll
texsurf-queries.ll
tid-range.ll
tuple-literal.ll
vec8.ll
vec-param-load.ll
vector-args.ll
vector-call.ll
vector-compare.ll
vector-global.ll
vector-loads.ll
vector-select.ll
vector-stores.ll
vote.ll
weak-global.ll
weak-linkage.ll
wmma.py [NVPTX, CUDA] Added support for m8n32k16 and m32n8k16 variants of wmma instructions. 2018-04-18 21:51:48 +00:00
zero-cs.ll
zeroext-32bit.ll