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287 lines
8.3 KiB
LLVM
287 lines
8.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=penryn | FileCheck %s
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; rdar://7475489
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define i32 @test1(i32 %a, i32 %b) nounwind ssp {
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; CHECK-LABEL: test1:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: movb {{[0-9]+}}(%esp), %al
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; CHECK-NEXT: xorb {{[0-9]+}}(%esp), %al
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; CHECK-NEXT: testb $64, %al
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; CHECK-NEXT: je LBB0_1
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; CHECK-NEXT: ## %bb.2: ## %bb1
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; CHECK-NEXT: jmp _bar ## TAILCALL
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; CHECK-NEXT: LBB0_1: ## %bb
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; CHECK-NEXT: jmp _foo ## TAILCALL
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entry:
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%0 = and i32 %a, 16384
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%1 = icmp ne i32 %0, 0
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%2 = and i32 %b, 16384
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%3 = icmp ne i32 %2, 0
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%4 = xor i1 %1, %3
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br i1 %4, label %bb1, label %bb
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bb: ; preds = %entry
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%5 = tail call i32 (...) @foo() nounwind ; <i32> [#uses=1]
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ret i32 %5
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bb1: ; preds = %entry
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%6 = tail call i32 (...) @bar() nounwind ; <i32> [#uses=1]
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ret i32 %6
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}
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declare i32 @foo(...)
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declare i32 @bar(...)
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; <rdar://problem/7598384>:
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;
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; jCC L1
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; jmp L2
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; L1:
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; ...
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; L2:
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; ...
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;
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; to:
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;
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; jnCC L2
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; L1:
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; ...
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; L2:
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; ...
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define float @test4(float %x, float %y) nounwind readnone optsize ssp {
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; CHECK-LABEL: test4:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: pushl %eax
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; CHECK-NEXT: cvtss2sd {{[0-9]+}}(%esp), %xmm1
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; CHECK-NEXT: cvtss2sd {{[0-9]+}}(%esp), %xmm0
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; CHECK-NEXT: mulsd %xmm1, %xmm0
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; CHECK-NEXT: xorpd %xmm1, %xmm1
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; CHECK-NEXT: ucomisd %xmm1, %xmm0
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; CHECK-NEXT: jne LBB1_1
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; CHECK-NEXT: jnp LBB1_2
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; CHECK-NEXT: LBB1_1: ## %bb1
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; CHECK-NEXT: addsd LCPI1_0, %xmm0
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; CHECK-NEXT: LBB1_2: ## %bb2
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; CHECK-NEXT: cvtsd2ss %xmm0, %xmm0
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; CHECK-NEXT: movss %xmm0, (%esp)
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; CHECK-NEXT: flds (%esp)
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; CHECK-NEXT: popl %eax
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; CHECK-NEXT: retl
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entry:
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%0 = fpext float %x to double ; <double> [#uses=1]
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%1 = fpext float %y to double ; <double> [#uses=1]
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%2 = fmul double %0, %1 ; <double> [#uses=3]
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%3 = fcmp oeq double %2, 0.000000e+00 ; <i1> [#uses=1]
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br i1 %3, label %bb2, label %bb1
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bb1: ; preds = %entry
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%4 = fadd double %2, -1.000000e+00 ; <double> [#uses=1]
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br label %bb2
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bb2: ; preds = %entry, %bb1
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%.0.in = phi double [ %4, %bb1 ], [ %2, %entry ] ; <double> [#uses=1]
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%.0 = fptrunc double %.0.in to float ; <float> [#uses=1]
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ret float %.0
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}
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declare i32 @llvm.x86.sse41.ptestz(<4 x float> %p1, <4 x float> %p2) nounwind
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declare i32 @llvm.x86.sse41.ptestc(<4 x float> %p1, <4 x float> %p2) nounwind
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define <4 x float> @test5(<4 x float> %a, <4 x float> %b) nounwind {
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; CHECK-LABEL: test5:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: ptest %xmm0, %xmm0
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; CHECK-NEXT: jne LBB2_2
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; CHECK-NEXT: ## %bb.1: ## %bb1
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; CHECK-NEXT: addps LCPI2_0, %xmm1
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; CHECK-NEXT: movaps %xmm1, %xmm0
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; CHECK-NEXT: retl
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; CHECK-NEXT: LBB2_2: ## %bb2
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; CHECK-NEXT: divps LCPI2_0, %xmm1
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; CHECK-NEXT: movaps %xmm1, %xmm0
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; CHECK-NEXT: retl
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entry:
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%res = call i32 @llvm.x86.sse41.ptestz(<4 x float> %a, <4 x float> %a) nounwind
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%one = icmp ne i32 %res, 0
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br i1 %one, label %bb1, label %bb2
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bb1:
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%c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
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br label %return
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bb2:
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%d = fdiv <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
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br label %return
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return:
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%e = phi <4 x float> [%c, %bb1], [%d, %bb2]
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ret <4 x float> %e
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}
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define <4 x float> @test7(<4 x float> %a, <4 x float> %b) nounwind {
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; CHECK-LABEL: test7:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: ptest %xmm0, %xmm0
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; CHECK-NEXT: jne LBB3_2
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; CHECK-NEXT: ## %bb.1: ## %bb1
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; CHECK-NEXT: addps LCPI3_0, %xmm1
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; CHECK-NEXT: movaps %xmm1, %xmm0
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; CHECK-NEXT: retl
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; CHECK-NEXT: LBB3_2: ## %bb2
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; CHECK-NEXT: divps LCPI3_0, %xmm1
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; CHECK-NEXT: movaps %xmm1, %xmm0
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; CHECK-NEXT: retl
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entry:
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%res = call i32 @llvm.x86.sse41.ptestz(<4 x float> %a, <4 x float> %a) nounwind
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%one = trunc i32 %res to i1
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br i1 %one, label %bb1, label %bb2
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bb1:
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%c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
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br label %return
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bb2:
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%d = fdiv <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
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br label %return
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return:
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%e = phi <4 x float> [%c, %bb1], [%d, %bb2]
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ret <4 x float> %e
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}
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define <4 x float> @test8(<4 x float> %a, <4 x float> %b) nounwind {
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; CHECK-LABEL: test8:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: ptest %xmm0, %xmm0
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; CHECK-NEXT: jae LBB4_2
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; CHECK-NEXT: ## %bb.1: ## %bb1
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; CHECK-NEXT: addps LCPI4_0, %xmm1
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; CHECK-NEXT: movaps %xmm1, %xmm0
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; CHECK-NEXT: retl
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; CHECK-NEXT: LBB4_2: ## %bb2
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; CHECK-NEXT: divps LCPI4_0, %xmm1
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; CHECK-NEXT: movaps %xmm1, %xmm0
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; CHECK-NEXT: retl
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entry:
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%res = call i32 @llvm.x86.sse41.ptestc(<4 x float> %a, <4 x float> %a) nounwind
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%one = icmp ne i32 %res, 0
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br i1 %one, label %bb1, label %bb2
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bb1:
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%c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
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br label %return
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bb2:
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%d = fdiv <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
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br label %return
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return:
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%e = phi <4 x float> [%c, %bb1], [%d, %bb2]
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ret <4 x float> %e
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}
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define <4 x float> @test10(<4 x float> %a, <4 x float> %b) nounwind {
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; CHECK-LABEL: test10:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: ptest %xmm0, %xmm0
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; CHECK-NEXT: jae LBB5_2
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; CHECK-NEXT: ## %bb.1: ## %bb1
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; CHECK-NEXT: addps LCPI5_0, %xmm1
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; CHECK-NEXT: movaps %xmm1, %xmm0
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; CHECK-NEXT: retl
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; CHECK-NEXT: LBB5_2: ## %bb2
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; CHECK-NEXT: divps LCPI5_0, %xmm1
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; CHECK-NEXT: movaps %xmm1, %xmm0
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; CHECK-NEXT: retl
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entry:
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%res = call i32 @llvm.x86.sse41.ptestc(<4 x float> %a, <4 x float> %a) nounwind
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%one = trunc i32 %res to i1
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br i1 %one, label %bb1, label %bb2
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bb1:
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%c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
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br label %return
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bb2:
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%d = fdiv <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
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br label %return
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return:
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%e = phi <4 x float> [%c, %bb1], [%d, %bb2]
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ret <4 x float> %e
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}
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define <4 x float> @test11(<4 x float> %a, <4 x float> %b) nounwind {
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; CHECK-LABEL: test11:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: ptest %xmm0, %xmm0
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; CHECK-NEXT: jne LBB6_2
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; CHECK-NEXT: ## %bb.1: ## %bb1
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; CHECK-NEXT: addps LCPI6_0, %xmm1
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; CHECK-NEXT: movaps %xmm1, %xmm0
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; CHECK-NEXT: retl
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; CHECK-NEXT: LBB6_2: ## %bb2
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; CHECK-NEXT: divps LCPI6_0, %xmm1
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; CHECK-NEXT: movaps %xmm1, %xmm0
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; CHECK-NEXT: retl
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entry:
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%res = call i32 @llvm.x86.sse41.ptestz(<4 x float> %a, <4 x float> %a) nounwind
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%one = icmp eq i32 %res, 1
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br i1 %one, label %bb1, label %bb2
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bb1:
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%c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
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br label %return
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bb2:
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%d = fdiv <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
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br label %return
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return:
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%e = phi <4 x float> [%c, %bb1], [%d, %bb2]
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ret <4 x float> %e
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}
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define <4 x float> @test12(<4 x float> %a, <4 x float> %b) nounwind {
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; CHECK-LABEL: test12:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: ptest %xmm0, %xmm0
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; CHECK-NEXT: je LBB7_2
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; CHECK-NEXT: ## %bb.1: ## %bb1
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; CHECK-NEXT: addps LCPI7_0, %xmm1
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; CHECK-NEXT: movaps %xmm1, %xmm0
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; CHECK-NEXT: retl
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; CHECK-NEXT: LBB7_2: ## %bb2
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; CHECK-NEXT: divps LCPI7_0, %xmm1
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; CHECK-NEXT: movaps %xmm1, %xmm0
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; CHECK-NEXT: retl
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entry:
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%res = call i32 @llvm.x86.sse41.ptestz(<4 x float> %a, <4 x float> %a) nounwind
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%one = icmp ne i32 %res, 1
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br i1 %one, label %bb1, label %bb2
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bb1:
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%c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
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br label %return
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bb2:
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%d = fdiv <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
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br label %return
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return:
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%e = phi <4 x float> [%c, %bb1], [%d, %bb2]
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ret <4 x float> %e
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}
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