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59eabed7b6
We're constant folding here, so we shouldn't check uses. This matches the IR optimizer behavior. The x86 test shows the expected win. The AArch64 test shows something else. This only seems to happen if the "generic" AArch64 CPU model is used by MachineCombiner, so I'll file a bug report to follow-up. llvm-svn: 334608
243 lines
6.4 KiB
LLVM
243 lines
6.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
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define float @fadd_zero_f32(float %x) #0 {
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; CHECK-LABEL: fadd_zero_f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: retq
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%y = fadd float %x, 0.0
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ret float %y
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}
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define <4 x float> @fadd_zero_4f32(<4 x float> %x) #0 {
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; CHECK-LABEL: fadd_zero_4f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: retq
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%y = fadd <4 x float> %x, zeroinitializer
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ret <4 x float> %y
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}
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; CHECK: float 3
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define float @fadd_2const_f32(float %x) #0 {
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; CHECK-LABEL: fadd_2const_f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addss {{.*}}(%rip), %xmm0
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; CHECK-NEXT: retq
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%y = fadd float %x, 1.0
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%z = fadd float %y, 2.0
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ret float %z
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}
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; CHECK: float 5
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; CHECK: float 5
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; CHECK: float 5
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; CHECK: float 5
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define <4 x float> @fadd_2const_4f32(<4 x float> %x) #0 {
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; CHECK-LABEL: fadd_2const_4f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addps {{.*}}(%rip), %xmm0
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; CHECK-NEXT: retq
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%y = fadd <4 x float> %x, <float 1.0, float 2.0, float 3.0, float 4.0>
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%z = fadd <4 x float> %y, <float 4.0, float 3.0, float 2.0, float 1.0>
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ret <4 x float> %z
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}
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; CHECK: float 3
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define float @fadd_x_fmul_x_c_f32(float %x) #0 {
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; CHECK-LABEL: fadd_x_fmul_x_c_f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: mulss {{.*}}(%rip), %xmm0
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; CHECK-NEXT: retq
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%y = fmul float %x, 2.0
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%z = fadd float %x, %y
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ret float %z
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}
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; CHECK: float 2
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; CHECK: float 3
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; CHECK: float 4
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; CHECK: float 5
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define <4 x float> @fadd_x_fmul_x_c_4f32(<4 x float> %x) #0 {
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; CHECK-LABEL: fadd_x_fmul_x_c_4f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: mulps {{.*}}(%rip), %xmm0
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; CHECK-NEXT: retq
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%y = fmul <4 x float> %x, <float 1.0, float 2.0, float 3.0, float 4.0>
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%z = fadd <4 x float> %x, %y
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ret <4 x float> %z
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}
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; CHECK: float 3
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define float @fadd_fmul_x_c_x_f32(float %x) #0 {
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; CHECK-LABEL: fadd_fmul_x_c_x_f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: mulss {{.*}}(%rip), %xmm0
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; CHECK-NEXT: retq
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%y = fmul float %x, 2.0
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%z = fadd float %y, %x
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ret float %z
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}
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; CHECK: float 2
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; CHECK: float 3
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; CHECK: float 4
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; CHECK: float 5
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define <4 x float> @fadd_fmul_x_c_x_4f32(<4 x float> %x) #0 {
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; CHECK-LABEL: fadd_fmul_x_c_x_4f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: mulps {{.*}}(%rip), %xmm0
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; CHECK-NEXT: retq
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%y = fmul <4 x float> %x, <float 1.0, float 2.0, float 3.0, float 4.0>
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%z = fadd <4 x float> %y, %x
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ret <4 x float> %z
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}
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; CHECK: float 4
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define float @fadd_fadd_x_x_fmul_x_c_f32(float %x) #0 {
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; CHECK-LABEL: fadd_fadd_x_x_fmul_x_c_f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: mulss {{.*}}(%rip), %xmm0
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; CHECK-NEXT: retq
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%y = fadd float %x, %x
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%z = fmul float %x, 2.0
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%w = fadd float %y, %z
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ret float %w
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}
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; CHECK: float 3
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; CHECK: float 4
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; CHECK: float 5
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; CHECK: float 6
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define <4 x float> @fadd_fadd_x_x_fmul_x_c_4f32(<4 x float> %x) #0 {
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; CHECK-LABEL: fadd_fadd_x_x_fmul_x_c_4f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: mulps {{.*}}(%rip), %xmm0
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; CHECK-NEXT: retq
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%y = fadd <4 x float> %x, %x
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%z = fmul <4 x float> %x, <float 1.0, float 2.0, float 3.0, float 4.0>
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%w = fadd <4 x float> %y, %z
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ret <4 x float> %w
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}
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; CHECK: float 4
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define float @fadd_fmul_x_c_fadd_x_x_f32(float %x) #0 {
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; CHECK-LABEL: fadd_fmul_x_c_fadd_x_x_f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: mulss {{.*}}(%rip), %xmm0
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; CHECK-NEXT: retq
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%y = fadd float %x, %x
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%z = fmul float %x, 2.0
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%w = fadd float %z, %y
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ret float %w
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}
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; CHECK: float 3
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; CHECK: float 4
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; CHECK: float 5
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; CHECK: float 6
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define <4 x float> @fadd_fmul_x_c_fadd_x_x_4f32(<4 x float> %x) #0 {
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; CHECK-LABEL: fadd_fmul_x_c_fadd_x_x_4f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: mulps {{.*}}(%rip), %xmm0
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; CHECK-NEXT: retq
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%y = fadd <4 x float> %x, %x
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%z = fmul <4 x float> %x, <float 1.0, float 2.0, float 3.0, float 4.0>
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%w = fadd <4 x float> %z, %y
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ret <4 x float> %w
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}
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; CHECK: float 3
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define float @fadd_x_fadd_x_x_f32(float %x) #0 {
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; CHECK-LABEL: fadd_x_fadd_x_x_f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: mulss {{.*}}(%rip), %xmm0
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; CHECK-NEXT: retq
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%y = fadd float %x, %x
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%z = fadd float %x, %y
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ret float %z
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}
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; CHECK: float 3
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; CHECK: float 3
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; CHECK: float 3
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; CHECK: float 3
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define <4 x float> @fadd_x_fadd_x_x_4f32(<4 x float> %x) #0 {
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; CHECK-LABEL: fadd_x_fadd_x_x_4f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: mulps {{.*}}(%rip), %xmm0
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; CHECK-NEXT: retq
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%y = fadd <4 x float> %x, %x
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%z = fadd <4 x float> %x, %y
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ret <4 x float> %z
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}
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; CHECK: float 3
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define float @fadd_fadd_x_x_x_f32(float %x) #0 {
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; CHECK-LABEL: fadd_fadd_x_x_x_f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: mulss {{.*}}(%rip), %xmm0
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; CHECK-NEXT: retq
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%y = fadd float %x, %x
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%z = fadd float %y, %x
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ret float %z
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}
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; CHECK: float 3
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; CHECK: float 3
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; CHECK: float 3
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; CHECK: float 3
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define <4 x float> @fadd_fadd_x_x_x_4f32(<4 x float> %x) #0 {
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; CHECK-LABEL: fadd_fadd_x_x_x_4f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: mulps {{.*}}(%rip), %xmm0
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; CHECK-NEXT: retq
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%y = fadd <4 x float> %x, %x
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%z = fadd <4 x float> %y, %x
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ret <4 x float> %z
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}
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; CHECK: float 4
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define float @fadd_fadd_x_x_fadd_x_x_f32(float %x) #0 {
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; CHECK-LABEL: fadd_fadd_x_x_fadd_x_x_f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: mulss {{.*}}(%rip), %xmm0
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; CHECK-NEXT: retq
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%y = fadd float %x, %x
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%z = fadd float %y, %y
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ret float %z
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}
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; CHECK: float 4
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; CHECK: float 4
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; CHECK: float 4
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; CHECK: float 4
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define <4 x float> @fadd_fadd_x_x_fadd_x_x_4f32(<4 x float> %x) #0 {
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; CHECK-LABEL: fadd_fadd_x_x_fadd_x_x_4f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: mulps {{.*}}(%rip), %xmm0
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; CHECK-NEXT: retq
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%y = fadd <4 x float> %x, %x
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%z = fadd <4 x float> %y, %y
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ret <4 x float> %z
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}
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; ((x + 42.0) + 17.0) + (x + 42.0) --> (x + 59.0) + (x + 17.0)
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; It's still 3 adds, but the first 2 are independent.
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; More reassocation could get this to 2 adds or 1 FMA (that's done in IR, but not in the DAG).
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define float @fadd_const_multiuse_attr(float %x) #0 {
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; CHECK-LABEL: fadd_const_multiuse_attr:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
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; CHECK-NEXT: addss %xmm0, %xmm1
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; CHECK-NEXT: addss {{.*}}(%rip), %xmm0
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; CHECK-NEXT: addss %xmm1, %xmm0
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; CHECK-NEXT: retq
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%a1 = fadd float %x, 42.0
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%a2 = fadd float %a1, 17.0
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%a3 = fadd float %a1, %a2
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ret float %a3
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}
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attributes #0 = { "less-precise-fpmad"="true" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "unsafe-fp-math"="true" "no-signed-zeros-fp-math"="true" }
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