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37 lines
955 B
LLVM
37 lines
955 B
LLVM
; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s -O0
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; This is a regression test which makes sure that the offset check
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; is available for STRiw_indexed instruction. This is required
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; by 'Hexagon Expand Predicate Spill Code' pass.
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define i32 @f(i32 %a, i32 %b) nounwind {
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entry:
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%retval = alloca i32, align 4
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%a.addr = alloca i32, align 4
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%b.addr = alloca i32, align 4
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store i32 %a, i32* %a.addr, align 4
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store i32 %b, i32* %b.addr, align 4
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%0 = load i32* %a.addr, align 4
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%1 = load i32* %b.addr, align 4
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%cmp = icmp sgt i32 %0, %1
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br i1 %cmp, label %if.then, label %if.else
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if.then:
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%2 = load i32* %a.addr, align 4
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%3 = load i32* %b.addr, align 4
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%add = add nsw i32 %2, %3
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store i32 %add, i32* %retval
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br label %return
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if.else:
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%4 = load i32* %a.addr, align 4
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%5 = load i32* %b.addr, align 4
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%sub = sub nsw i32 %4, %5
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store i32 %sub, i32* %retval
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br label %return
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return:
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%6 = load i32* %retval
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ret i32 %6
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}
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