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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 12:12:47 +01:00
llvm-mirror/lib/Target/Alpha
Andrew Lenharth 96520cb68d typo
llvm-svn: 25464
2006-01-19 21:10:38 +00:00
..
.cvsignore
Alpha.h
Alpha.td Add attribute name and type to SubtargetFeatures. 2005-10-26 17:28:23 +00:00
AlphaAsmPrinter.cpp add br pattern, unify JSR and BSR ISel instrs, and add BSR support for DAG 2005-12-25 17:36:48 +00:00
AlphaCodeEmitter.cpp massive DAGISel patch. lots and lots more stuff compiles now 2005-11-22 04:20:06 +00:00
AlphaInstrFormats.td stack and rpcc 2006-01-16 21:22:38 +00:00
AlphaInstrInfo.cpp whatever. Intermediate patch to see what breaks. Seems ok. 2005-11-09 19:17:08 +00:00
AlphaInstrInfo.h
AlphaInstrInfo.td typo 2006-01-19 21:10:38 +00:00
AlphaISelDAGToDAG.cpp stack and rpcc 2006-01-16 21:22:38 +00:00
AlphaISelLowering.cpp typo 2006-01-19 21:10:38 +00:00
AlphaISelLowering.h Friendly names 2006-01-16 19:53:25 +00:00
AlphaISelPattern.cpp add br pattern, unify JSR and BSR ISel instrs, and add BSR support for DAG 2005-12-25 17:36:48 +00:00
AlphaJITInfo.cpp Remove a 'using namespace std'. 2006-01-01 22:20:31 +00:00
AlphaJITInfo.h
AlphaRegisterInfo.cpp clean this function up some 2006-01-01 22:13:54 +00:00
AlphaRegisterInfo.h whatever. Intermediate patch to see what breaks. Seems ok. 2005-11-09 19:17:08 +00:00
AlphaRegisterInfo.td Support multiple ValueTypes per RegisterClass, needed for upcoming vector 2005-12-01 04:51:06 +00:00
AlphaRelocations.h
AlphaSubtarget.cpp Give full control of subtarget features over to table generated code. 2005-10-26 17:30:34 +00:00
AlphaSubtarget.h Typo made worse x 2 - take 2. 2005-10-26 18:07:50 +00:00
AlphaTargetMachine.cpp make DAG isel the default 2006-01-13 18:49:47 +00:00
AlphaTargetMachine.h Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build. 2005-11-08 02:11:51 +00:00
Makefile Autogen subtarget information from .td files. 2005-10-23 22:15:34 +00:00