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Summary: ARMv6KZ cores were set up incorrectly in ARM.td; also, the SMI mnemonic (the old name for SMC, as defined in ARMv6KZ) wasn't supported. Reviewers: jmolloy, rengolin Subscribers: aemerson, rengolin, llvm-commits Differential Revision: http://reviews.llvm.org/D14154 llvm-svn: 251627
27 lines
1.0 KiB
ArmAsm
27 lines
1.0 KiB
ArmAsm
@ RUN: not llvm-mc -triple=thumbv7-apple-darwin -mcpu=cortex-a8 -show-encoding -mattr=-trustzone < %s | FileCheck %s -check-prefix=NOTZ
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@ RUN: llvm-mc -triple=thumbv7-apple-darwin -mcpu=cortex-a8 -show-encoding -mattr=trustzone < %s | FileCheck %s -check-prefix=TZ
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@ RUN: not llvm-mc -triple=thumbv6kz -mcpu=arm1176jzf-s -show-encoding < %s | FileCheck %s -check-prefix=NOTZ
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.syntax unified
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.globl _func
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@ Check that the assembler processes SMC instructions when TrustZone support is
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@ active and that it rejects them when this feature is not enabled
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_func:
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@ CHECK: _func
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@------------------------------------------------------------------------------
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@ SMC
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@------------------------------------------------------------------------------
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smc #0xf
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ite eq
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smceq #0
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@ NOTZ-NOT: smc #15
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@ NOTZ-NOT: smceq #0
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@ TZ: smc #15 @ encoding: [0xff,0xf7,0x00,0x80]
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@ TZ: ite eq @ encoding: [0x0c,0xbf]
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@ TZ: smceq #0 @ encoding: [0xf0,0xf7,0x00,0x80]
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