mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-25 20:23:11 +01:00
ada97c52fe
handles argument lowering anyway, so there's no need for special casing here. llvm-svn: 102828
273 lines
10 KiB
C++
273 lines
10 KiB
C++
//===-- FunctionLoweringInfo.cpp ------------------------------------------===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
// This implements routines for translating functions from LLVM IR into
|
|
// Machine IR.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#define DEBUG_TYPE "function-lowering-info"
|
|
#include "FunctionLoweringInfo.h"
|
|
#include "llvm/DerivedTypes.h"
|
|
#include "llvm/Function.h"
|
|
#include "llvm/Instructions.h"
|
|
#include "llvm/IntrinsicInst.h"
|
|
#include "llvm/LLVMContext.h"
|
|
#include "llvm/Module.h"
|
|
#include "llvm/CodeGen/Analysis.h"
|
|
#include "llvm/CodeGen/MachineFunction.h"
|
|
#include "llvm/CodeGen/MachineFrameInfo.h"
|
|
#include "llvm/CodeGen/MachineInstrBuilder.h"
|
|
#include "llvm/CodeGen/MachineModuleInfo.h"
|
|
#include "llvm/CodeGen/MachineRegisterInfo.h"
|
|
#include "llvm/Target/TargetRegisterInfo.h"
|
|
#include "llvm/Target/TargetData.h"
|
|
#include "llvm/Target/TargetFrameInfo.h"
|
|
#include "llvm/Target/TargetInstrInfo.h"
|
|
#include "llvm/Target/TargetIntrinsicInfo.h"
|
|
#include "llvm/Target/TargetLowering.h"
|
|
#include "llvm/Target/TargetOptions.h"
|
|
#include "llvm/Support/Debug.h"
|
|
#include "llvm/Support/ErrorHandling.h"
|
|
#include "llvm/Support/MathExtras.h"
|
|
#include <algorithm>
|
|
using namespace llvm;
|
|
|
|
/// isUsedOutsideOfDefiningBlock - Return true if this instruction is used by
|
|
/// PHI nodes or outside of the basic block that defines it, or used by a
|
|
/// switch or atomic instruction, which may expand to multiple basic blocks.
|
|
static bool isUsedOutsideOfDefiningBlock(const Instruction *I) {
|
|
if (I->use_empty()) return false;
|
|
if (isa<PHINode>(I)) return true;
|
|
const BasicBlock *BB = I->getParent();
|
|
for (Value::const_use_iterator UI = I->use_begin(), E = I->use_end();
|
|
UI != E; ++UI)
|
|
if (cast<Instruction>(*UI)->getParent() != BB || isa<PHINode>(*UI))
|
|
return true;
|
|
return false;
|
|
}
|
|
|
|
/// isOnlyUsedInEntryBlock - If the specified argument is only used in the
|
|
/// entry block, return true. This includes arguments used by switches, since
|
|
/// the switch may expand into multiple basic blocks.
|
|
static bool isOnlyUsedInEntryBlock(const Argument *A, bool EnableFastISel) {
|
|
// With FastISel active, we may be splitting blocks, so force creation
|
|
// of virtual registers for all non-dead arguments.
|
|
if (EnableFastISel)
|
|
return A->use_empty();
|
|
|
|
const BasicBlock *Entry = A->getParent()->begin();
|
|
for (Value::const_use_iterator UI = A->use_begin(), E = A->use_end();
|
|
UI != E; ++UI)
|
|
if (cast<Instruction>(*UI)->getParent() != Entry || isa<SwitchInst>(*UI))
|
|
return false; // Use not in entry block.
|
|
return true;
|
|
}
|
|
|
|
FunctionLoweringInfo::FunctionLoweringInfo(const TargetLowering &tli)
|
|
: TLI(tli) {
|
|
}
|
|
|
|
void FunctionLoweringInfo::set(const Function &fn, MachineFunction &mf,
|
|
bool EnableFastISel) {
|
|
Fn = &fn;
|
|
MF = &mf;
|
|
RegInfo = &MF->getRegInfo();
|
|
|
|
// Create a vreg for each argument register that is not dead and is used
|
|
// outside of the entry block for the function.
|
|
for (Function::const_arg_iterator AI = Fn->arg_begin(), E = Fn->arg_end();
|
|
AI != E; ++AI)
|
|
if (!isOnlyUsedInEntryBlock(AI, EnableFastISel))
|
|
InitializeRegForValue(AI);
|
|
|
|
// Initialize the mapping of values to registers. This is only set up for
|
|
// instruction values that are used outside of the block that defines
|
|
// them.
|
|
Function::const_iterator BB = Fn->begin(), EB = Fn->end();
|
|
for (BasicBlock::const_iterator I = BB->begin(), E = BB->end(); I != E; ++I)
|
|
if (const AllocaInst *AI = dyn_cast<AllocaInst>(I))
|
|
if (const ConstantInt *CUI = dyn_cast<ConstantInt>(AI->getArraySize())) {
|
|
const Type *Ty = AI->getAllocatedType();
|
|
uint64_t TySize = TLI.getTargetData()->getTypeAllocSize(Ty);
|
|
unsigned Align =
|
|
std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty),
|
|
AI->getAlignment());
|
|
|
|
TySize *= CUI->getZExtValue(); // Get total allocated size.
|
|
if (TySize == 0) TySize = 1; // Don't create zero-sized stack objects.
|
|
StaticAllocaMap[AI] =
|
|
MF->getFrameInfo()->CreateStackObject(TySize, Align, false);
|
|
}
|
|
|
|
for (; BB != EB; ++BB)
|
|
for (BasicBlock::const_iterator I = BB->begin(), E = BB->end(); I != E; ++I)
|
|
if (isUsedOutsideOfDefiningBlock(I))
|
|
if (!isa<AllocaInst>(I) ||
|
|
!StaticAllocaMap.count(cast<AllocaInst>(I)))
|
|
InitializeRegForValue(I);
|
|
|
|
// Create an initial MachineBasicBlock for each LLVM BasicBlock in F. This
|
|
// also creates the initial PHI MachineInstrs, though none of the input
|
|
// operands are populated.
|
|
for (BB = Fn->begin(); BB != EB; ++BB) {
|
|
MachineBasicBlock *MBB = mf.CreateMachineBasicBlock(BB);
|
|
MBBMap[BB] = MBB;
|
|
MF->push_back(MBB);
|
|
|
|
// Transfer the address-taken flag. This is necessary because there could
|
|
// be multiple MachineBasicBlocks corresponding to one BasicBlock, and only
|
|
// the first one should be marked.
|
|
if (BB->hasAddressTaken())
|
|
MBB->setHasAddressTaken();
|
|
|
|
// Create Machine PHI nodes for LLVM PHI nodes, lowering them as
|
|
// appropriate.
|
|
for (BasicBlock::const_iterator I = BB->begin();
|
|
const PHINode *PN = dyn_cast<PHINode>(I); ++I) {
|
|
if (PN->use_empty()) continue;
|
|
|
|
DebugLoc DL = PN->getDebugLoc();
|
|
unsigned PHIReg = ValueMap[PN];
|
|
assert(PHIReg && "PHI node does not have an assigned virtual register!");
|
|
|
|
SmallVector<EVT, 4> ValueVTs;
|
|
ComputeValueVTs(TLI, PN->getType(), ValueVTs);
|
|
for (unsigned vti = 0, vte = ValueVTs.size(); vti != vte; ++vti) {
|
|
EVT VT = ValueVTs[vti];
|
|
unsigned NumRegisters = TLI.getNumRegisters(Fn->getContext(), VT);
|
|
const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
|
|
for (unsigned i = 0; i != NumRegisters; ++i)
|
|
BuildMI(MBB, DL, TII->get(TargetOpcode::PHI), PHIReg + i);
|
|
PHIReg += NumRegisters;
|
|
}
|
|
}
|
|
}
|
|
|
|
// Mark landing pad blocks.
|
|
for (BB = Fn->begin(); BB != EB; ++BB)
|
|
if (const InvokeInst *Invoke = dyn_cast<InvokeInst>(BB->getTerminator()))
|
|
MBBMap[Invoke->getSuccessor(1)]->setIsLandingPad();
|
|
}
|
|
|
|
/// clear - Clear out all the function-specific state. This returns this
|
|
/// FunctionLoweringInfo to an empty state, ready to be used for a
|
|
/// different function.
|
|
void FunctionLoweringInfo::clear() {
|
|
assert(CatchInfoFound.size() == CatchInfoLost.size() &&
|
|
"Not all catch info was assigned to a landing pad!");
|
|
|
|
MBBMap.clear();
|
|
ValueMap.clear();
|
|
StaticAllocaMap.clear();
|
|
#ifndef NDEBUG
|
|
CatchInfoLost.clear();
|
|
CatchInfoFound.clear();
|
|
#endif
|
|
LiveOutRegInfo.clear();
|
|
ArgDbgValues.clear();
|
|
}
|
|
|
|
unsigned FunctionLoweringInfo::MakeReg(EVT VT) {
|
|
return RegInfo->createVirtualRegister(TLI.getRegClassFor(VT));
|
|
}
|
|
|
|
/// CreateRegForValue - Allocate the appropriate number of virtual registers of
|
|
/// the correctly promoted or expanded types. Assign these registers
|
|
/// consecutive vreg numbers and return the first assigned number.
|
|
///
|
|
/// In the case that the given value has struct or array type, this function
|
|
/// will assign registers for each member or element.
|
|
///
|
|
unsigned FunctionLoweringInfo::CreateRegForValue(const Value *V) {
|
|
SmallVector<EVT, 4> ValueVTs;
|
|
ComputeValueVTs(TLI, V->getType(), ValueVTs);
|
|
|
|
unsigned FirstReg = 0;
|
|
for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) {
|
|
EVT ValueVT = ValueVTs[Value];
|
|
EVT RegisterVT = TLI.getRegisterType(V->getContext(), ValueVT);
|
|
|
|
unsigned NumRegs = TLI.getNumRegisters(V->getContext(), ValueVT);
|
|
for (unsigned i = 0; i != NumRegs; ++i) {
|
|
unsigned R = MakeReg(RegisterVT);
|
|
if (!FirstReg) FirstReg = R;
|
|
}
|
|
}
|
|
return FirstReg;
|
|
}
|
|
|
|
/// AddCatchInfo - Extract the personality and type infos from an eh.selector
|
|
/// call, and add them to the specified machine basic block.
|
|
void llvm::AddCatchInfo(const CallInst &I, MachineModuleInfo *MMI,
|
|
MachineBasicBlock *MBB) {
|
|
// Inform the MachineModuleInfo of the personality for this landing pad.
|
|
const ConstantExpr *CE = cast<ConstantExpr>(I.getOperand(2));
|
|
assert(CE->getOpcode() == Instruction::BitCast &&
|
|
isa<Function>(CE->getOperand(0)) &&
|
|
"Personality should be a function");
|
|
MMI->addPersonality(MBB, cast<Function>(CE->getOperand(0)));
|
|
|
|
// Gather all the type infos for this landing pad and pass them along to
|
|
// MachineModuleInfo.
|
|
std::vector<const GlobalVariable *> TyInfo;
|
|
unsigned N = I.getNumOperands();
|
|
|
|
for (unsigned i = N - 1; i > 2; --i) {
|
|
if (const ConstantInt *CI = dyn_cast<ConstantInt>(I.getOperand(i))) {
|
|
unsigned FilterLength = CI->getZExtValue();
|
|
unsigned FirstCatch = i + FilterLength + !FilterLength;
|
|
assert (FirstCatch <= N && "Invalid filter length");
|
|
|
|
if (FirstCatch < N) {
|
|
TyInfo.reserve(N - FirstCatch);
|
|
for (unsigned j = FirstCatch; j < N; ++j)
|
|
TyInfo.push_back(ExtractTypeInfo(I.getOperand(j)));
|
|
MMI->addCatchTypeInfo(MBB, TyInfo);
|
|
TyInfo.clear();
|
|
}
|
|
|
|
if (!FilterLength) {
|
|
// Cleanup.
|
|
MMI->addCleanup(MBB);
|
|
} else {
|
|
// Filter.
|
|
TyInfo.reserve(FilterLength - 1);
|
|
for (unsigned j = i + 1; j < FirstCatch; ++j)
|
|
TyInfo.push_back(ExtractTypeInfo(I.getOperand(j)));
|
|
MMI->addFilterTypeInfo(MBB, TyInfo);
|
|
TyInfo.clear();
|
|
}
|
|
|
|
N = i;
|
|
}
|
|
}
|
|
|
|
if (N > 3) {
|
|
TyInfo.reserve(N - 3);
|
|
for (unsigned j = 3; j < N; ++j)
|
|
TyInfo.push_back(ExtractTypeInfo(I.getOperand(j)));
|
|
MMI->addCatchTypeInfo(MBB, TyInfo);
|
|
}
|
|
}
|
|
|
|
void llvm::CopyCatchInfo(const BasicBlock *SrcBB, const BasicBlock *DestBB,
|
|
MachineModuleInfo *MMI, FunctionLoweringInfo &FLI) {
|
|
for (BasicBlock::const_iterator I = SrcBB->begin(), E = --SrcBB->end();
|
|
I != E; ++I)
|
|
if (const EHSelectorInst *EHSel = dyn_cast<EHSelectorInst>(I)) {
|
|
// Apply the catch info to DestBB.
|
|
AddCatchInfo(*EHSel, MMI, FLI.MBBMap[DestBB]);
|
|
#ifndef NDEBUG
|
|
if (!FLI.MBBMap[SrcBB]->isLandingPad())
|
|
FLI.CatchInfoFound.insert(EHSel);
|
|
#endif
|
|
}
|
|
}
|