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d0175fe81c
This patch adds a lot of additional tests, focusing on loops and GEP arithmetic. Some of the tests expose existing problems, which will be fixed soon.
99 lines
3.0 KiB
LLVM
99 lines
3.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -constraint-elimination -S %s | FileCheck %s
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declare void @use(i1)
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define void @loop_iv_cond_variable_bound(i32 %n) {
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; CHECK-LABEL: @loop_iv_cond_variable_bound(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[T_1:%.*]] = icmp ule i32 [[IV]], [[N:%.*]]
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; CHECK-NEXT: call void @use(i1 [[T_1]])
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; CHECK-NEXT: [[T_2:%.*]] = icmp sge i32 [[IV]], 0
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; CHECK-NEXT: call void @use(i1 [[T_2]])
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; CHECK-NEXT: [[T_3:%.*]] = icmp sge i32 [[IV]], -1
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; CHECK-NEXT: call void @use(i1 [[T_3]])
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; CHECK-NEXT: [[C_1:%.*]] = icmp ult i32 [[IV]], [[N]]
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; CHECK-NEXT: call void @use(i1 [[C_1]])
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; CHECK-NEXT: [[C_2:%.*]] = icmp ugt i32 [[IV]], 1
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; CHECK-NEXT: call void @use(i1 [[C_2]])
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[IV]], [[N]]
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; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
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; CHECK-NEXT: br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]
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%t.1 = icmp ule i32 %iv, %n
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call void @use(i1 %t.1)
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%t.2 = icmp sge i32 %iv, 0
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call void @use(i1 %t.2)
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%t.3 = icmp sge i32 %iv, -1
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call void @use(i1 %t.3)
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%c.1 = icmp ult i32 %iv, %n
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call void @use(i1 %c.1)
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%c.2 = icmp ugt i32 %iv, 1
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call void @use(i1 %c.2)
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%cmp = icmp ult i32 %iv, %n
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%iv.next = add nuw nsw i32 %iv, 1
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br i1 %cmp, label %loop, label %exit
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exit:
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ret void
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}
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define void @loop_iv_cond_constant_bound() {
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; CHECK-LABEL: @loop_iv_cond_constant_bound(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[T_1:%.*]] = icmp ule i32 [[IV]], 2
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; CHECK-NEXT: call void @use(i1 [[T_1]])
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; CHECK-NEXT: [[T_2:%.*]] = icmp sge i32 [[IV]], 0
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; CHECK-NEXT: call void @use(i1 [[T_2]])
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; CHECK-NEXT: [[T_3:%.*]] = icmp sge i32 [[IV]], -1
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; CHECK-NEXT: call void @use(i1 [[T_3]])
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; CHECK-NEXT: [[C_1:%.*]] = icmp ult i32 [[IV]], 2
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; CHECK-NEXT: call void @use(i1 [[C_1]])
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; CHECK-NEXT: [[C_2:%.*]] = icmp ugt i32 [[IV]], 1
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; CHECK-NEXT: call void @use(i1 [[C_2]])
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[IV]], 2
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; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
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; CHECK-NEXT: br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]
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%t.1 = icmp ule i32 %iv, 2
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call void @use(i1 %t.1)
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%t.2 = icmp sge i32 %iv, 0
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call void @use(i1 %t.2)
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%t.3 = icmp sge i32 %iv, -1
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call void @use(i1 %t.3)
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%c.1 = icmp ult i32 %iv, 2
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call void @use(i1 %c.1)
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%c.2 = icmp ugt i32 %iv, 1
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call void @use(i1 %c.2)
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%cmp = icmp ult i32 %iv, 2
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%iv.next = add nuw nsw i32 %iv, 1
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br i1 %cmp, label %loop, label %exit
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exit:
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ret void
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}
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