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e3e67d4a0a
This changes the SelectionDAG scheduling preference to source order. Soon, the SelectionDAG scheduler can be bypassed saving a nice chunk of compile time. Performance differences that result from this change are often a consequence of register coalescing. The register coalescer is far from perfect. Bugs can be filed for deficiencies. On x86 SandyBridge/Haswell, the source order schedule is often preserved, particularly for small blocks. Register pressure is generally improved over the SD scheduler's ILP mode. However, we are still able to handle large blocks that require latency hiding, unlike the SD scheduler's BURR mode. MI scheduler also attempts to discover the critical path in single-block loops and adjust heuristics accordingly. The MI scheduler relies on the new machine model. This is currently unimplemented for AVX, so we may not be generating the best code yet. Unit tests are updated so they don't depend on SD scheduling heuristics. llvm-svn: 192750
182 lines
3.7 KiB
LLVM
182 lines
3.7 KiB
LLVM
; RUN: llc -mtriple=i386-unknown-unknown -mcpu=core-avx2 < %s | FileCheck --check-prefix=BMI2 %s
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; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=core-avx2 < %s | FileCheck --check-prefix=BMI264 %s
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define i32 @shl32(i32 %x, i32 %shamt) nounwind uwtable readnone {
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entry:
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%shl = shl i32 %x, %shamt
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; BMI2: shl32
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; BMI2: shlxl
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; BMI2: ret
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; BMI264: shl32
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; BMI264: shlxl
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; BMI264: ret
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ret i32 %shl
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}
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define i32 @shl32i(i32 %x) nounwind uwtable readnone {
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entry:
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%shl = shl i32 %x, 5
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; BMI2: shl32i
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; BMI2-NOT: shlxl
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; BMI2: ret
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; BMI264: shl32i
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; BMI264-NOT: shlxl
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; BMI264: ret
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ret i32 %shl
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}
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define i32 @shl32p(i32* %p, i32 %shamt) nounwind uwtable readnone {
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entry:
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%x = load i32* %p
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%shl = shl i32 %x, %shamt
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; BMI2: shl32p
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; Source order scheduling prevents folding, rdar:14208996.
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; BMI2: shlxl %{{.+}}, %{{.+}}, %{{.+}}
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; BMI2: ret
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; BMI264: shl32p
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; BMI264: shlxl %{{.+}}, %{{.+}}, %{{.+}}
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; BMI264: ret
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ret i32 %shl
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}
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define i32 @shl32pi(i32* %p) nounwind uwtable readnone {
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entry:
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%x = load i32* %p
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%shl = shl i32 %x, 5
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; BMI2: shl32pi
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; BMI2-NOT: shlxl
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; BMI2: ret
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; BMI264: shl32pi
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; BMI264-NOT: shlxl
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; BMI264: ret
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ret i32 %shl
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}
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define i64 @shl64(i64 %x, i64 %shamt) nounwind uwtable readnone {
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entry:
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%shl = shl i64 %x, %shamt
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; BMI264: shl64
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; BMI264: shlxq
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; BMI264: ret
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ret i64 %shl
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}
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define i64 @shl64i(i64 %x) nounwind uwtable readnone {
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entry:
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%shl = shl i64 %x, 7
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; BMI264: shl64i
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; BMI264-NOT: shlxq
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; BMI264: ret
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ret i64 %shl
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}
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define i64 @shl64p(i64* %p, i64 %shamt) nounwind uwtable readnone {
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entry:
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%x = load i64* %p
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%shl = shl i64 %x, %shamt
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; BMI264: shl64p
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; BMI264: shlxq %{{.+}}, %{{.+}}, %{{.+}}
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; BMI264: ret
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ret i64 %shl
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}
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define i64 @shl64pi(i64* %p) nounwind uwtable readnone {
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entry:
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%x = load i64* %p
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%shl = shl i64 %x, 7
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; BMI264: shl64pi
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; BMI264-NOT: shlxq
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; BMI264: ret
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ret i64 %shl
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}
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define i32 @lshr32(i32 %x, i32 %shamt) nounwind uwtable readnone {
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entry:
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%shl = lshr i32 %x, %shamt
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; BMI2: lshr32
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; BMI2: shrxl
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; BMI2: ret
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; BMI264: lshr32
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; BMI264: shrxl
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; BMI264: ret
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ret i32 %shl
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}
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define i32 @lshr32p(i32* %p, i32 %shamt) nounwind uwtable readnone {
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entry:
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%x = load i32* %p
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%shl = lshr i32 %x, %shamt
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; BMI2: lshr32p
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; Source order scheduling prevents folding, rdar:14208996.
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; BMI2: shrxl %{{.+}}, %{{.+}}, %{{.+}}
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; BMI2: ret
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; BMI264: lshr32p
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; BMI264: shrxl %{{.+}}, %{{.+}}, %{{.+}}
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; BMI264: ret
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ret i32 %shl
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}
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define i64 @lshr64(i64 %x, i64 %shamt) nounwind uwtable readnone {
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entry:
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%shl = lshr i64 %x, %shamt
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; BMI264: lshr64
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; BMI264: shrxq
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; BMI264: ret
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ret i64 %shl
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}
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define i64 @lshr64p(i64* %p, i64 %shamt) nounwind uwtable readnone {
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entry:
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%x = load i64* %p
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%shl = lshr i64 %x, %shamt
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; BMI264: lshr64p
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; BMI264: shrxq %{{.+}}, %{{.+}}, %{{.+}}
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; BMI264: ret
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ret i64 %shl
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}
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define i32 @ashr32(i32 %x, i32 %shamt) nounwind uwtable readnone {
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entry:
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%shl = ashr i32 %x, %shamt
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; BMI2: ashr32
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; BMI2: sarxl
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; BMI2: ret
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; BMI264: ashr32
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; BMI264: sarxl
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; BMI264: ret
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ret i32 %shl
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}
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define i32 @ashr32p(i32* %p, i32 %shamt) nounwind uwtable readnone {
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entry:
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%x = load i32* %p
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%shl = ashr i32 %x, %shamt
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; BMI2: ashr32p
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; Source order scheduling prevents folding, rdar:14208996.
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; BMI2: sarxl %{{.+}}, %{{.+}}, %{{.+}}
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; BMI2: ret
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; BMI264: ashr32p
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; BMI264: sarxl %{{.+}}, %{{.+}}, %{{.+}}
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; BMI264: ret
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ret i32 %shl
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}
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define i64 @ashr64(i64 %x, i64 %shamt) nounwind uwtable readnone {
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entry:
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%shl = ashr i64 %x, %shamt
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; BMI264: ashr64
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; BMI264: sarxq
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; BMI264: ret
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ret i64 %shl
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}
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define i64 @ashr64p(i64* %p, i64 %shamt) nounwind uwtable readnone {
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entry:
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%x = load i64* %p
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%shl = ashr i64 %x, %shamt
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; BMI264: ashr64p
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; BMI264: sarxq %{{.+}}, %{{.+}}, %{{.+}}
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; BMI264: ret
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ret i64 %shl
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}
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