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9875b17d87
These were specifying an architecture version with .cpu directive, which is invalid. As the error for this case outputs the problem instruction we were still matching the expectations of FileCheck. This patch fixes up the LSE tests to do what they seem to intend. A follow-up patch will tighten up the directive tests. Differential Revision: https://reviews.llvm.org/D47872 llvm-svn: 335585
75 lines
1.4 KiB
ArmAsm
75 lines
1.4 KiB
ArmAsm
// RUN: not llvm-mc -triple aarch64-unknown-none-eabi -filetype asm -o - %s 2>&1 | FileCheck %s
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.cpu generic
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fminnm d0, d0, d1
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.cpu generic+fp
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fminnm d0, d0, d1
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.cpu generic+nofp
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fminnm d0, d0, d1
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.cpu generic+simd
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addp v0.4s, v0.4s, v0.4s
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.cpu generic+nosimd
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addp v0.4s, v0.4s, v0.4s
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.cpu generic+crc
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crc32cx w0, w1, x3
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.cpu generic+nocrc
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crc32cx w0, w1, x3
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.cpu generic+crypto+nocrc
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aesd v0.16b, v2.16b
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.cpu generic+nocrypto+crc
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aesd v0.16b, v2.16b
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.cpu generic+nolse
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casa w5, w7, [x20]
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.cpu generic+lse
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casa w5, w7, [x20]
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// NOTE: the errors precede the actual output! The errors appear in order
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// though, so validate by hoisting them to the top and preservering relative
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// ordering
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// CHECK: error: instruction requires: fp-armv8
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// CHECK: fminnm d0, d0, d1
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// CHECK: ^
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// CHECK: error: instruction requires: neon
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// CHECK: addp v0.4s, v0.4s, v0.4s
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// CHECK: ^
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// CHECK: error: instruction requires: crc
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// CHECK: crc32cx w0, w1, x3
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// CHECK: ^
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// CHECK: error: instruction requires: crypto
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// CHECK: aesd v0.16b, v2.16b
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// CHECK: ^
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// CHECK: error: instruction requires: lse
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// CHECK: casa w5, w7, [x20]
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// CHECK: ^
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// CHECK: fminnm d0, d0, d1
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// CHECK: fminnm d0, d0, d1
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// CHECK: addp v0.4s, v0.4s, v0.4s
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// CHECK: crc32cx w0, w1, x3
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// CHECK: aesd v0.16b, v2.16b
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// CHECK: casa w5, w7, [x20]
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