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674ab91499
Currently, the Int_eh_sjlj_dispatchsetup intrinsic is marked as clobbering all registers, including floating-point registers that may not be present on the target. This is technically true, as we could get linked against code that does use the FP registers, but that will not actually work, as the soft-float code cannot save and restore the FP registers. SjLj exception handling can only work correctly if either all or none of the code is built for a target with FP registers. Therefore, we can assume that, when Int_eh_sjlj_dispatchsetup is compiled for a soft-float target, it is only going to be linked against other soft-float code, and so only clobbers the general-purpose registers. This allows us to check that no non-savable registers are clobbered when generating the prologue/epilogue. Differential Revision: https://reviews.llvm.org/D25180 llvm-svn: 283866
108 lines
3.7 KiB
LLVM
108 lines
3.7 KiB
LLVM
; RUN: llc -mtriple armv7-apple-ios -relocation-model=pic -o - %s | FileCheck %s -check-prefix=ARM-PIC -check-prefix=ARM
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; RUN: llc -mtriple armv7-apple-ios -relocation-model=static -o - %s | FileCheck %s -check-prefix=ARM-NOPIC -check-prefix=ARM
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; RUN: llc -mtriple armv7-apple-ios -relocation-model=dynamic-no-pic -o - %s | FileCheck %s -check-prefix=ARM-NOPIC -check-prefix=ARM
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; RUN: llc -mtriple thumbv6-apple-ios -relocation-model=pic -o - %s | FileCheck %s -check-prefix=THUMB1-PIC -check-prefix=THUMB1
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; RUN: llc -mtriple thumbv6-apple-ios -relocation-model=static -o - %s | FileCheck %s -check-prefix=THUMB1-NOPIC -check-prefix=THUMB1
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; RUN: llc -mtriple thumbv6-apple-ios -relocation-model=dynamic-no-pic -o - %s | FileCheck %s -check-prefix=THUMB1-NOPIC -check-prefix=THUMB1
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@_ZTIi = external constant i8*
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define i32 @main() #0 personality i8* bitcast (i32 (...)* @__gxx_personality_sj0 to i8*) {
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entry:
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%exception = tail call i8* @__cxa_allocate_exception(i32 4) #1
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%0 = bitcast i8* %exception to i32*
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store i32 1, i32* %0, align 4
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invoke void @__cxa_throw(i8* %exception, i8* bitcast (i8** @_ZTIi to i8*), i8* null) #2
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to label %unreachable unwind label %lpad
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lpad: ; preds = %entry
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%1 = landingpad { i8*, i32 }
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catch i8* null
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%2 = extractvalue { i8*, i32 } %1, 0
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%3 = tail call i8* @__cxa_begin_catch(i8* %2) #1
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tail call void @__cxa_end_catch()
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ret i32 0
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unreachable: ; preds = %entry
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unreachable
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}
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declare i8* @__cxa_allocate_exception(i32)
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declare void @__cxa_throw(i8*, i8*, i8*)
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declare i8* @__cxa_begin_catch(i8*)
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declare void @__cxa_end_catch()
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declare i32 @__gxx_personality_sj0(...)
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attributes #0 = { ssp }
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attributes #1 = { nounwind }
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attributes #2 = { noreturn }
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; ARM: vst1.64
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; ARM: vst1.64
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; ARM-PIC: cxa_throw
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; ARM-PIC: trap
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; ARM-PIC: adr [[REG1:r[0-9]+]], [[LJTI:.*]]
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; ARM-PIC: ldr [[REG0:r[0-9]+]], [r{{[0-9]+}}, [[REG1]]]
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; ARM-PIC: add pc, [[REG0]], [[REG1]]
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; ARM-PIC: [[LJTI]]
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; ARM-PIC: .data_region jt32
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; ARM-PIC: .long [[LABEL:LBB0_[0-9]]]-[[LJTI]]
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; ARM-PIC: .end_data_region
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; ARM-PIC: [[LABEL]]
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; ARM-NOPIC: cxa_throw
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; ARM-NOPIC: trap
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; ARM-NOPIC: adr [[REG1:r[0-9]+]], [[LJTI:.*]]
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; ARM-NOPIC: ldr [[REG0:r[0-9]+]], [r{{[0-9]+}}, [[REG1]]]
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; ARM-NOPIC: mov pc, [[REG0]]
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; ARM-NOPIC: [[LJTI]]
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; ARM-NOPIC: .data_region jt32
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; ARM-NOPIC: .long [[LABEL:LBB0_[0-9]]]
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; ARM-NOPIC: .end_data_region
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; ARM-NOPIC: [[LABEL]]
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; ARM: vld1.64
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; ARM: vld1.64
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; On Thumb1 targets, we have no way to preserve the floating-point registers.
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; If all other code is built for Thumb1 or is built soft-float, this is not a
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; problem as the FP regs don't need saving. However, if this code is linked
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; against ARM code that uses the FP regs, they won't be restored correctly. We
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; don't support this use-case, but have no way to prevent it in the compiler.
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; THUMB1: push {{[^d]*$}}
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; THUMB1-NOT: vst
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; THUMB1-PIC: cxa_throw
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; THUMB1-PIC: trap
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; THUMB1-PIC: adr [[REG1:r[0-9]+]], [[LJTI:.*]]
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; THUMB1-PIC: adds [[REG0:r[0-9]+]], [[REG0]], [[REG1]]
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; THUMB1-PIC: ldr [[REG0]]
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; THUMB1-PIC: adds [[REG0]], [[REG0]], [[REG1]]
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; THUMB1-PIC: mov pc, [[REG0]]
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; THUMB1-PIC: [[LJTI]]
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; THUMB1-PIC: .data_region jt32
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; THUMB1-PIC: .long [[LABEL:LBB0_[0-9]]]-[[LJTI]]
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; THUMB1-PIC: .end_data_region
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; THUMB1-PIC: [[LABEL]]
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; THUMB1-NOPIC: cxa_throw
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; THUMB1-NOPIC: trap
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; THUMB1-NOPIC: adr [[REG1:r[0-9]+]], [[LJTI:.*]]
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; THUMB1-NOPIC: adds [[REG0:r[0-9]+]], [[REG0]], [[REG1]]
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; THUMB1-NOPIC: ldr [[REG0]]
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; THUMB1-NOPIC: mov pc, [[REG0]]
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; THUMB1-NOPIC: [[LJTI]]
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; THUMB1-NOPIC: .data_region jt32
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; THUMB1-NOPIC: .long [[LABEL:LBB0_[0-9]]]+1
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; THUMB1-NOPIC: .end_data_region
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; THUMB1-NOPIC: [[LABEL]]
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; THUMB1-NOT: vld
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; THUMB1: pop {{[^d]*$}}
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