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Add both cores to the target parser and TableGen. Test that eabi attributes are set correctly for both cores. Additionally, test the absence and presence of MOVT in Cortex-M23 and Cortex-M33, respectively. Committed on behalf of Sanne Wouda. Reviewers : rengolin, olista01. Differential Revision: https://reviews.llvm.org/D29073 llvm-svn: 293761
30 lines
795 B
LLVM
30 lines
795 B
LLVM
; RUN: llc -mtriple=arm-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
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; rdar://7317664
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; RUN: llc -mtriple=thumbv8m.base %s -o - | FileCheck %s
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; RUN: llc -mtriple=thumbv8m.base -mcpu=cortex-m23 %s -o - | FileCheck %s --check-prefix=NOMOVT
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; RUN: llc -mtriple=thumbv8m.base -mcpu=cortex-m33 %s -o - | FileCheck %s
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define i32 @t(i32 %X) nounwind {
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; CHECK-LABEL: t:
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; CHECK: movt r{{[0-9]}}, #65535
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; NOMOVT-LABEL: t:
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; NOMOVT-NOT: movt r{{[0-9]}}, #65535
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; NOMOVT: ldr r{{[0-9]}}, .LCP
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entry:
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%0 = or i32 %X, -65536
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ret i32 %0
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}
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define i32 @t2(i32 %X) nounwind {
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; CHECK-LABEL: t2:
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; CHECK: movt r{{[0-9]}}, #65534
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; NOMOVT-LABEL: t2:
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; NOMOVT-NOT: movt r{{[0-9]}}, #65534
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; NOMOVT: ldr r{{[0-9]}}, .LCP
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entry:
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%0 = or i32 %X, -131072
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%1 = and i32 %0, -65537
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ret i32 %1
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}
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