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llvm-mirror/test/CodeGen/ARM/relax-per-target-feature.ll
Peter Smith 7d816e3012 [MC] Pass MCSubtargetInfo to fixupNeedsRelaxation and applyFixup
On targets like Arm some relaxations may only be performed when certain
architectural features are available. As functions can be compiled with
differing levels of architectural support we must make a judgement on
whether we can relax based on the MCSubtargetInfo for the function. This
change passes through the MCSubtargetInfo for the function to
fixupNeedsRelaxation so that the decision on whether to relax can be made
per function. In this patch, only the ARM backend makes use of this
information. We must also pass the MCSubtargetInfo to applyFixup because
some fixups skip error checking on the assumption that relaxation has
occurred, to prevent code-generation errors applyFixup must see the same
MCSubtargetInfo as fixupNeedsRelaxation.

Differential Revision: https://reviews.llvm.org/D44928

llvm-svn: 334078
2018-06-06 09:40:06 +00:00

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1.5 KiB
LLVM

; RUN: llc -mtriple=thumbv4t-linux-gnueabi -o - %s | FileCheck %s
; Functions may have more features than the base triple; code generation and
; instruction selection may be performed based on this information. This test
; makes sure that the MC layer performs instruction relaxation based on the
; target-features of the function. The relaxation for tail call is particularly
; important on Thumb2 as the 16-bit Thumb branch instruction has an extremely
; short range.
declare dso_local void @g(...) local_unnamed_addr #2
define dso_local void @f() local_unnamed_addr #0 {
entry:
tail call void bitcast (void (...)* @g to void ()*)() #3
ret void
}
; Function has thumb2 target-feature, tail call is allowed and must be widened.
; CHECK: f:
; CHECK: b g
define dso_local void @h() local_unnamed_addr #2 {
entry:
tail call void bitcast (void (...)* @g to void ()*)() #3
ret void
}
; Function does not have thumb2 target-feature, tail call should not be
; generated as it cannot be widened.
; CHECK: h:
; CHECK: bl g
attributes #0 = { nounwind "disable-tail-calls"="false" "target-cpu"="cortex-a53" "target-features"="+crypto,+fp-armv8,+neon,+soft-float-abi,+strict-align,+thumb-mode,-crc,-dotprod,-dsp,-hwdiv,-hwdiv-arm,-ras" "use-soft-float"="true" }
attributes #2 = { nounwind "disable-tail-calls"="false" "target-cpu"="arm7tdmi" "target-features"="+strict-align,+thumb-mode,-crc,-dotprod,-dsp,-hwdiv,-hwdiv-arm,-ras" "unsafe-fp-math"="false" "use-soft-float"="true" }
attributes #3 = { nounwind }