mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-23 13:02:52 +02:00
ab043ff680
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
llvm-svn: 230794
26 lines
936 B
LLVM
26 lines
936 B
LLVM
; Test the MSA move intrinsics (which are encoded with the ELM instruction
|
|
; format).
|
|
|
|
; RUN: llc -march=mips -mattr=+msa,+fp64 < %s | FileCheck %s
|
|
; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s | FileCheck %s
|
|
|
|
@llvm_mips_move_vb_ARG1 = global <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>, align 16
|
|
@llvm_mips_move_vb_RES = global <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, align 16
|
|
|
|
define void @llvm_mips_move_vb_test() nounwind {
|
|
entry:
|
|
%0 = load <16 x i8>, <16 x i8>* @llvm_mips_move_vb_ARG1
|
|
%1 = tail call <16 x i8> @llvm.mips.move.v(<16 x i8> %0)
|
|
store <16 x i8> %1, <16 x i8>* @llvm_mips_move_vb_RES
|
|
ret void
|
|
}
|
|
|
|
declare <16 x i8> @llvm.mips.move.v(<16 x i8>) nounwind
|
|
|
|
; CHECK: llvm_mips_move_vb_test:
|
|
; CHECK: ld.b
|
|
; CHECK: move.v
|
|
; CHECK: st.b
|
|
; CHECK: .size llvm_mips_move_vb_test
|
|
;
|