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llvm-mirror/test/CodeGen/ARM/peephole-bitcast.ll
Jakob Stoklund Olesen 33f01d005c Fix ARM tests to be register allocator independent.
llvm-svn: 128680
2011-03-31 22:14:03 +00:00

27 lines
725 B
LLVM

; RUN: llc < %s -march=arm -mcpu=cortex-a8 -regalloc=linearscan | FileCheck %s
; vmov s0, r0 + vmov r0, s0 should have been optimized away.
; rdar://9104514
; Peephole leaves a dead vmovsr instruction behind, and depends on linear scan
; to remove it.
define void @t(float %x) nounwind ssp {
entry:
; CHECK: t:
; CHECK-NOT: vmov
; CHECK: bl
%0 = bitcast float %x to i32
%cmp = icmp ult i32 %0, 2139095039
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
tail call void @doSomething(float %x) nounwind
br label %if.end
if.end: ; preds = %if.then, %entry
ret void
}
declare void @doSomething(float)