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916e01c917
Additional fixes: Do something reasonable for subtargets with generic itineraries by handle node latency the same as for an empty itinerary. Now nodes default to unit latency unless an itinerary explicitly specifies a zero cycle stage or it is a TokenFactor chain. Original fixes: UnitsSharePred was a source of randomness in the scheduler: node priority depended on the queue data structure. I rewrote the recent VRegCycle heuristics to completely replace the old heuristic without any randomness. To make the ndoe latency adjustments work, I also needed to do something a little more reasonable with TokenFactor. I gave it zero latency to its consumers and always schedule it as low as possible. llvm-svn: 129421
42 lines
1.2 KiB
LLVM
42 lines
1.2 KiB
LLVM
; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -pre-RA-sched=source | FileCheck %s
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; Test that we correctly align elements when using va_arg
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; CHECK: test1:
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; CHECK-NOT: bfc
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; CHECK: add [[REG:(r[0-9]+)|(lr)]], {{(r[0-9]+)|(lr)}}, #7
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; CHECK: bfc [[REG]], #0, #3
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; CHECK-NOT: bfc
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define i64 @test1(i32 %i, ...) nounwind optsize {
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entry:
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%g = alloca i8*, align 4
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%g1 = bitcast i8** %g to i8*
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call void @llvm.va_start(i8* %g1)
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%0 = va_arg i8** %g, i64
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call void @llvm.va_end(i8* %g1)
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ret i64 %0
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}
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; CHECK: test2:
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; CHECK-NOT: bfc
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; CHECK: add [[REG:(r[0-9]+)|(lr)]], {{(r[0-9]+)|(lr)}}, #7
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; CHECK: bfc [[REG]], #0, #3
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; CHECK-NOT: bfc
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; CHECK: bx lr
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define double @test2(i32 %a, i32 %b, ...) nounwind optsize {
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entry:
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%ap = alloca i8*, align 4 ; <i8**> [#uses=3]
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%ap1 = bitcast i8** %ap to i8* ; <i8*> [#uses=2]
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call void @llvm.va_start(i8* %ap1)
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%0 = va_arg i8** %ap, i32 ; <i32> [#uses=0]
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%1 = va_arg i8** %ap, double ; <double> [#uses=1]
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call void @llvm.va_end(i8* %ap1)
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ret double %1
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}
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declare void @llvm.va_start(i8*) nounwind
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declare void @llvm.va_end(i8*) nounwind
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