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llvm-mirror/test/CodeGen/PowerPC/addisdtprelha-nonr3.mir
Matthias Braun 923da8d677 MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
Rename AllVRegsAllocated to NoVRegs. This avoids the connotation of
running after register and simply describes that no vregs are used in
a machine function. With that we can simply compute the property and do
not need to dump/parse it in .mir files.

Differential Revision: http://reviews.llvm.org/D23850

llvm-svn: 279698
2016-08-25 01:27:13 +00:00

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# RUN: llc -relocation-model=pic -start-after=block-placement -o - %s | FileCheck %s
--- |
target datalayout = "E-m:e-i64:64-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
@x = internal thread_local unnamed_addr global i1 false
@y = external thread_local global i32, align 4
; Function Attrs: nounwind
define void @test1() #0 {
entry:
store i1 true, i1* @x, align 1
store i32 20, i32* @y, align 4
ret void
}
attributes #0 = { nounwind "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "target-cpu"="pwr7" }
!llvm.module.flags = !{!0}
!0 = !{i32 1, !"PIC Level", i32 2}
...
---
name: test1
alignment: 4
exposesReturnsTwice: false
tracksRegLiveness: true
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 64
offsetAdjustment: 0
maxAlignment: 0
adjustsStack: false
hasCalls: false
maxCallFrameSize: 48
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
fixedStack:
- { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, callee-saved-register: '%x30' }
- { id: 1, offset: -8, size: 8, alignment: 8, isImmutable: true, isAliased: false }
body: |
bb.0.entry:
liveins: %x30, %x30
%x0 = MFLR8 implicit %lr8
STD %x31, -8, %x1
STD killed %x0, 16, %x1
%x1 = STDU %x1, -64, %x1
%x3 = ADDIStlsldHA %x2, @x
%x31 = OR8 %x1, %x1
%x3 = ADDItlsldL killed %x3, @x
STD killed %x30, 48, %x31 :: (store 8 into %fixed-stack.0, align 16)
%x3 = GETtlsldADDR killed %x3, @x, implicit-def dead %x0, implicit-def dead %x4, implicit-def dead %x5, implicit-def dead %x6, implicit-def dead %x7, implicit-def dead %x8, implicit-def dead %x9, implicit-def dead %x10, implicit-def dead %x11, implicit-def dead %x12, implicit-def %lr8, implicit-def %ctr8, implicit-def dead %cr0, implicit-def dead %cr1, implicit-def dead %cr5, implicit-def dead %cr6, implicit-def dead %cr7
%x12 = ADDIStlsgdHA %x2, @y
%x30 = OR8 killed %x3, %x3
%x3 = ADDItlsgdL killed %x12, @y
%x3 = GETtlsADDR killed %x3, @y, implicit-def dead %x0, implicit-def dead %x4, implicit-def dead %x5, implicit-def dead %x6, implicit-def dead %x7, implicit-def dead %x8, implicit-def dead %x9, implicit-def dead %x10, implicit-def dead %x11, implicit-def dead %x12, implicit-def %lr8, implicit-def %ctr8, implicit-def dead %cr0, implicit-def dead %cr1, implicit-def dead %cr5, implicit-def dead %cr6, implicit-def dead %cr7
%x4 = ADDISdtprelHA killed %x30, @x
; CHECK: addis 4, 30, x@dtprel@ha
%x5 = LI8 1
%r6 = LI 20
%x30 = LD 48, %x31 :: (load 8 from %fixed-stack.0, align 16)
STB8 killed %x5, target-flags(ppc-dtprel-lo) @x, killed %x4 :: (store 1 into @x)
STW killed %r6, 0, killed %x3 :: (store 4 into @y)
%x1 = ADDI8 %x1, 64
%x0 = LD 16, %x1
%x31 = LD -8, %x1
MTLR8 killed %x0, implicit-def %lr8
BLR8 implicit %lr8, implicit %rm
...