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ca0f4dc4f0
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. llvm-svn: 209577
72 lines
1.9 KiB
LLVM
72 lines
1.9 KiB
LLVM
; RUN: llc -march=arm64 -mattr=+crc -o - %s | FileCheck %s
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define i32 @test_crc32b(i32 %cur, i8 %next) {
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; CHECK-LABEL: test_crc32b:
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; CHECK: crc32b w0, w0, w1
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%bits = zext i8 %next to i32
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%val = call i32 @llvm.aarch64.crc32b(i32 %cur, i32 %bits)
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ret i32 %val
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}
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define i32 @test_crc32h(i32 %cur, i16 %next) {
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; CHECK-LABEL: test_crc32h:
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; CHECK: crc32h w0, w0, w1
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%bits = zext i16 %next to i32
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%val = call i32 @llvm.aarch64.crc32h(i32 %cur, i32 %bits)
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ret i32 %val
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}
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define i32 @test_crc32w(i32 %cur, i32 %next) {
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; CHECK-LABEL: test_crc32w:
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; CHECK: crc32w w0, w0, w1
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%val = call i32 @llvm.aarch64.crc32w(i32 %cur, i32 %next)
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ret i32 %val
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}
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define i32 @test_crc32x(i32 %cur, i64 %next) {
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; CHECK-LABEL: test_crc32x:
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; CHECK: crc32x w0, w0, x1
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%val = call i32 @llvm.aarch64.crc32x(i32 %cur, i64 %next)
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ret i32 %val
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}
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define i32 @test_crc32cb(i32 %cur, i8 %next) {
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; CHECK-LABEL: test_crc32cb:
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; CHECK: crc32cb w0, w0, w1
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%bits = zext i8 %next to i32
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%val = call i32 @llvm.aarch64.crc32cb(i32 %cur, i32 %bits)
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ret i32 %val
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}
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define i32 @test_crc32ch(i32 %cur, i16 %next) {
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; CHECK-LABEL: test_crc32ch:
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; CHECK: crc32ch w0, w0, w1
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%bits = zext i16 %next to i32
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%val = call i32 @llvm.aarch64.crc32ch(i32 %cur, i32 %bits)
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ret i32 %val
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}
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define i32 @test_crc32cw(i32 %cur, i32 %next) {
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; CHECK-LABEL: test_crc32cw:
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; CHECK: crc32cw w0, w0, w1
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%val = call i32 @llvm.aarch64.crc32cw(i32 %cur, i32 %next)
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ret i32 %val
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}
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define i32 @test_crc32cx(i32 %cur, i64 %next) {
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; CHECK-LABEL: test_crc32cx:
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; CHECK: crc32cx w0, w0, x1
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%val = call i32 @llvm.aarch64.crc32cx(i32 %cur, i64 %next)
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ret i32 %val
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}
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declare i32 @llvm.aarch64.crc32b(i32, i32)
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declare i32 @llvm.aarch64.crc32h(i32, i32)
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declare i32 @llvm.aarch64.crc32w(i32, i32)
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declare i32 @llvm.aarch64.crc32x(i32, i64)
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declare i32 @llvm.aarch64.crc32cb(i32, i32)
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declare i32 @llvm.aarch64.crc32ch(i32, i32)
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declare i32 @llvm.aarch64.crc32cw(i32, i32)
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declare i32 @llvm.aarch64.crc32cx(i32, i64)
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