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AArch64
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[AArch64]Merge halfword loads into a 32-bit load
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2015-10-19 18:34:53 +00:00 |
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AMDGPU
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AMDGPU: Fix verifier error in SIFoldOperands
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2015-10-21 22:37:50 +00:00 |
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ARM
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Add missing load/store flags to thumb2 instructions.
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2015-10-22 01:48:57 +00:00 |
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BPF
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[bpf] Do not expand UNDEF SDNode during insn selection lowering
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2015-10-08 18:52:40 +00:00 |
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CPP
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Fix CPP Backend for GEP API changes for opaque pointer types
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2015-09-08 18:42:29 +00:00 |
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Generic
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[Hexagon] Reverting test file change.
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2015-10-17 01:58:51 +00:00 |
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Hexagon
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Tail duplication can mix incompatible registers in phi nodes
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2015-10-21 02:40:06 +00:00 |
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Inputs
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DI: Require subprogram definitions to be distinct
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2015-08-28 20:26:49 +00:00 |
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Mips
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[mips][mips16] Re-work the inline assembly stubs to work with IAS. NFC.
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2015-10-21 12:44:14 +00:00 |
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MIR
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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
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2015-10-15 14:34:23 +00:00 |
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MSP430
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NVPTX
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[NVPTX] Let NVPTX backend detect integer min and max patterns.
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2015-08-26 23:22:02 +00:00 |
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PowerPC
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[MachO] Stop generating *coal* sections.
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2015-10-15 05:28:38 +00:00 |
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SPARC
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Drop assert that a call with struct return goes to a function with sret
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2015-10-21 20:05:01 +00:00 |
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SystemZ
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Let MachineVerifier be aware of mem-to-mem instructions.
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2015-10-21 07:39:47 +00:00 |
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Thumb
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[ARM] Modify codegen for memcpy intrinsic to prefer LDM/STM.
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2015-10-05 14:49:54 +00:00 |
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Thumb2
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[ARM] Use correct half-precision functions in EABI mode
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2015-10-07 16:58:49 +00:00 |
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WebAssembly
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WebAssembly: fix more syntax
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2015-10-22 02:32:50 +00:00 |
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WinEH
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[WinEH] Fix eh.exceptionpointer intrinsic lowering
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2015-10-17 00:08:08 +00:00 |
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X86
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[X86][AVX512] extend vcvtph2ps to support xmm/ymm and sae versions
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2015-10-22 14:01:16 +00:00 |
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XCore
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[opaque pointer type] Add textual IR support for explicit type parameter for global aliases
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2015-09-11 03:22:04 +00:00 |
