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0f24d11c47
The generic SoftFloatVectorExtract.ll test was failing when run on arm machines, as it tries to create a f64 under soft float. Limit the transform to when f64 is legal. Also add a missing override, as reported in D100244.
24 lines
791 B
LLVM
24 lines
791 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=armv7a-linux-gnu < %s | FileCheck %s
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; Copied from llvm/test/CodeGen/Generic/2009-03-29-SoftFloatVectorExtract.ll,
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; making sure that soft float extract works on v7a soft float triples.
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@m = external global <2 x double>
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define double @vector_ex() nounwind #0 {
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; CHECK-LABEL: vector_ex:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: movw r0, :lower16:m
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; CHECK-NEXT: movt r0, :upper16:m
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; CHECK-NEXT: vld1.64 {d16, d17}, [r0]
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; CHECK-NEXT: vmov.32 r0, d17[0]
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; CHECK-NEXT: vmov.32 r1, d17[1]
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; CHECK-NEXT: bx lr
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%v = load <2 x double>, <2 x double>* @m
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%x = extractelement <2 x double> %v, i32 1
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ret double %x
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}
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attributes #0 = { "use-soft-float" = "true" }
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