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llvm-mirror/test/CodeGen/ARM/fp-only-sp.ll
Simon Tatham a1d7f2fdc1 [ARM] Replace fp-only-sp and d16 with fp64 and d32.
Those two subtarget features were awkward because their semantics are
reversed: each one indicates the _lack_ of support for something in
the architecture, rather than the presence. As a consequence, you
don't get the behavior you want if you combine two sets of feature
bits.

Each SubtargetFeature for an FP architecture version now comes in four
versions, one for each combination of those options. So you can still
say (for example) '+vfp2' in a feature string and it will mean what
it's always meant, but there's a new string '+vfp2d16sp' meaning the
version without those extra options.

A lot of this change is just mechanically replacing positive checks
for the old features with negative checks for the new ones. But one
more interesting change is that I've rearranged getFPUFeatures() so
that the main FPU feature is appended to the output list *before*
rather than after the features derived from the Restriction field, so
that -fp64 and -d32 can override defaults added by the main feature.

Reviewers: dmgreen, samparker, SjoerdMeijer

Subscribers: srhines, javed.absar, eraman, kristof.beyls, hiraditya, zzheng, Petar.Avramovic, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D60691

llvm-svn: 361845
2019-05-28 16:13:20 +00:00

63 lines
1.6 KiB
LLVM

; RUN: llc -mtriple=thumbv7em-apple-macho -mcpu=cortex-m4 %s -o - -O0 | FileCheck %s
; RUN: llc -mtriple=thumbv7em-apple-macho -mcpu=cortex-m4 %s -o - | FileCheck %s
; Note: vldr and vstr really do have 64-bit variants even with -fp64
define void @test_load_store(double* %addr) {
; CHECK-LABEL: test_load_store:
; CHECK: vldr [[TMP:d[0-9]+]], [r0]
; CHECK: vstr [[TMP]], [r0]
%val = load volatile double, double* %addr
store volatile double %val, double* %addr
ret void
}
define void @test_cmp(double %l, double %r, i1* %addr.dst) {
; CHECK-LABEL: test_cmp:
; CHECK: bl ___eqdf2
%res = fcmp oeq double %l, %r
store i1 %res, i1* %addr.dst
ret void
}
define void @test_ext(float %in, double* %addr) {
; CHECK-LABEL: test_ext:
; CHECK: bl ___extendsfdf2
%res = fpext float %in to double
store double %res, double* %addr
ret void
}
define void @test_trunc(double %in, float* %addr) {
; CHECK-LABEL: test_trunc:
; CHECK: bl ___truncdfsf2
%res = fptrunc double %in to float
store float %res, float* %addr
ret void
}
define void @test_itofp(i32 %in, double* %addr) {
; CHECK-LABEL: test_itofp:
; CHECK: bl ___floatsidf
%res = sitofp i32 %in to double
store double %res, double* %addr
; %res = fptoui double %tmp to i32
ret void
}
define i32 @test_fptoi(double* %addr) {
; CHECK-LABEL: test_fptoi:
; CHECK: bl ___fixunsdfsi
%val = load double, double* %addr
%res = fptoui double %val to i32
ret i32 %res
}
define void @test_binop(double* %addr) {
; CHECK-LABEL: test_binop:
; CHECK: bl ___adddf3
%in = load double, double* %addr
%res = fadd double %in, %in
store double %res, double* %addr
ret void
}