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llvm-mirror/test/CodeGen/ARM/ifcvt-branch-weight-bug.ll
Evgeniy Brevnov 865492560f [BPI] Improve static heuristics for "cold" paths.
Current approach doesn't work well in cases when multiple paths are predicted to be "cold". By "cold" paths I mean those containing "unreachable" instruction, call marked with 'cold' attribute and 'unwind' handler of 'invoke' instruction. The issue is that heuristics are applied one by one until the first match and essentially ignores relative hotness/coldness
 of other paths.

New approach unifies processing of "cold" paths by assigning predefined absolute weight to each block estimated to be "cold". Then we propagate these weights up/down IR similarly to existing approach. And finally set up edge probabilities based on estimated block weights.

One important difference is how we propagate weight up. Existing approach propagates the same weight to all blocks that are post-dominated by a block with some "known" weight. This is useless at least because it always gives 50\50 distribution which is assumed by default anyway. Worse, it causes the algorithm to skip further heuristics and can miss setting more accurate probability. New algorithm propagates the weight up only to the blocks that dominates and post-dominated by a block with some "known" weight. In other words, those blocks that are either always executed or not executed together.

In addition new approach processes loops in an uniform way as well. Essentially loop exit edges are estimated as "cold" paths relative to back edges and should be considered uniformly with other coldness/hotness markers.

Reviewed By: yrouban

Differential Revision: https://reviews.llvm.org/D79485
2020-12-23 22:47:36 +07:00

65 lines
1.9 KiB
LLVM

; RUN: llc < %s -mtriple=armv4t--linux-androideabi -stop-after=if-converter | FileCheck %s
; Fix a bug triggered in IfConverterTriangle when CvtBB has multiple
; predecessors.
; PR18752
%classK = type { i8, %classF }
%classF = type { i8 }
%classL = type { %classG, i32, i32 }
%classG = type { %classL* }
%classM2 = type { %classL }
define zeroext i1 @test(%classK* %this, %classL* nocapture readnone %p0, %classM2* nocapture readnone %p1, %classM2* nocapture readnone %p2, i32 %a0) align 2 {
entry:
br i1 undef, label %for.end, label %for.body
; Before if conversion, we have
; for.body -> lor.lhs.false.i (50%)
; -> for.cond.backedge (50%)
; lor.lhs.false.i -> for.cond.backedge (100%)
; -> cond.false.i (0%)
; Afer if conversion, we have
; for.body -> for.cond.backedge (100%)
; -> cond.false.i (0%)
; CHECK: bb.1.for.body:
; CHECK: successors: %bb.2(0x80000000), %bb.4(0x00000000)
for.body:
br i1 undef, label %for.cond.backedge, label %lor.lhs.false.i, !prof !1
for.cond.backedge:
%tobool = icmp eq %classL* %p0, null
br i1 %tobool, label %for.end, label %for.body
lor.lhs.false.i:
%tobool.i.i7 = icmp eq i32 %a0, 0
br i1 %tobool.i.i7, label %for.cond.backedge, label %cond.false.i
cond.false.i:
call void @_Z3fn1v()
unreachable
for.end:
%tobool.i.i9 = icmp eq i32 %a0, 32
br i1 %tobool.i.i9, label %if.else.i.i, label %if.then.i.i
if.then.i.i:
store %classL* null, %classL** undef, align 4
br label %_ZN1M6spliceEv.exit
if.else.i.i:
store %classL* null, %classL** null, align 4
br label %_ZN1M6spliceEv.exit
_ZN1M6spliceEv.exit:
%LIS = getelementptr inbounds %classK, %classK* %this, i32 0, i32 1
call void @_ZN1F10handleMoveEb(%classF* %LIS, i1 zeroext false)
unreachable
}
declare %classL* @_ZN1M1JI1LS1_EcvPS1_Ev(%classM2*)
declare void @_ZN1F10handleMoveEb(%classF*, i1 zeroext)
declare void @_Z3fn1v()
!0 = !{!"clang version 3.5"}
!1 = !{!"branch_weights", i32 62, i32 62}