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1900a7e6ef
If a function definition is not exact, then the linker could select a differently-compiled version of it, which could use different registers. https://reviews.llvm.org/D64909 llvm-svn: 366557
45 lines
1.4 KiB
LLVM
45 lines
1.4 KiB
LLVM
; RUN: llc -mtriple armv7a--none-eabi < %s -enable-ipra | FileCheck %s
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; A linkone_odr function (the same applies to available_externally, linkonce,
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; weak, common, extern_weak and weak_odr) could be replaced with a
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; differently-compiled version of the same source at link time, which might use
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; different registers, so we can't do IPRA on it.
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define linkonce_odr void @leaf_linkonce_odr() {
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entry:
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ret void
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}
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define void @test_linkonce_odr() {
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; CHECK-LABEL: test_linkonce_odr:
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entry:
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; CHECK: ASM1: r3
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; CHECK: mov [[TEMP:r[0-9]+]], r3
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; CHECK: bl leaf_linkonce_odr
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; CHECK: mov r3, [[TEMP]]
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; CHECK: ASM2: r3
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%0 = tail call i32 asm sideeffect "// ASM1: $0", "={r3},0"(i32 undef)
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tail call void @leaf_linkonce_odr()
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%1 = tail call i32 asm sideeffect "// ASM2: $0", "={r3},0"(i32 %0)
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ret void
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}
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; This function has external linkage (the same applies to private, internal and
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; appending), so the version we see here is guaranteed to be the version
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; selected by the linker, so we can do IPRA.
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define external void @leaf_external() {
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entry:
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ret void
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}
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define void @test_external() {
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; CHECK-LABEL: test_external:
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entry:
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; CHECK: ASM1: r3
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; CHECK-NOT: r3
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; CHECK: bl leaf_external
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; CHECK-NOT: r3
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; CHECK: ASM2: r3
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%0 = tail call i32 asm sideeffect "// ASM1: $0", "={r3},0"(i32 undef)
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tail call void @leaf_external()
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%1 = tail call i32 asm sideeffect "// ASM2: $0", "={r3},0"(i32 %0)
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ret void
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}
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