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https://github.com/RPCS3/llvm-mirror.git
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265 lines
9.6 KiB
LLVM
265 lines
9.6 KiB
LLVM
; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 -regalloc=fast -optimize-regalloc=0 -verify-machineinstrs | FileCheck %s -check-prefix=A8 -check-prefix=CHECK -check-prefix=NORMAL
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; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-m3 -regalloc=fast -optimize-regalloc=0 | FileCheck %s -check-prefix=M3 -check-prefix=CHECK -check-prefix=NORMAL
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; rdar://6949835
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; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 -regalloc=basic | FileCheck %s -check-prefix=BASIC -check-prefix=CHECK -check-prefix=NORMAL
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; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 -regalloc=greedy | FileCheck %s -check-prefix=GREEDY -check-prefix=CHECK -check-prefix=NORMAL
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; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=swift | FileCheck %s -check-prefix=CHECK -check-prefix=NORMAL
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; RUN: llc < %s -mtriple=thumbv7-apple-ios -arm-assume-misaligned-load-store | FileCheck %s -check-prefix=CHECK -check-prefix=CONSERVATIVE
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; Magic ARM pair hints works best with linearscan / fast.
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@b = external global i64*
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; We use the following two to force values into specific registers.
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declare i64* @get_ptr()
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declare void @use_i64(i64 %v)
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define void @test_ldrd(i64 %a) nounwind readonly "frame-pointer"="all" {
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; CHECK-LABEL: test_ldrd:
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; NORMAL: bl{{x?}} _get_ptr
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; A8: ldrd r0, r1, [r0]
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; Cortex-M3 errata 602117: LDRD with base in list may result in incorrect base
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; register when interrupted or faulted.
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; M3-NOT: ldrd r[[REGNUM:[0-9]+]], {{r[0-9]+}}, [r[[REGNUM]]]
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; CONSERVATIVE-NOT: ldrd
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; NORMAL: bl{{x?}} _use_i64
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%ptr = call i64* @get_ptr()
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%v = load i64, i64* %ptr, align 8
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call void @use_i64(i64 %v)
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ret void
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}
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; rdar://10435045 mixed LDRi8/LDRi12
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;
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; In this case, LSR generate a sequence of LDRi8/LDRi12. We should be
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; able to generate an LDRD pair here, but this is highly sensitive to
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; regalloc hinting. So, this doubles as a register allocation
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; test. RABasic currently does a better job within the inner loop
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; because of its *lack* of hinting ability. Whereas RAGreedy keeps
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; R0/R1/R2 live as the three arguments, forcing the LDRD's odd
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; destination into R3. We then sensibly split LDRD again rather then
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; evict another live range or use callee saved regs. Sorry if the test
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; is sensitive to Regalloc changes, but it is an interesting case.
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;
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; CHECK-LABEL: f:
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; BASIC: %bb
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; BASIC: ldrd
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; BASIC: str
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; GREEDY: %bb
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; GREEDY: ldrd
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; GREEDY: str
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define void @f(i32* nocapture %a, i32* nocapture %b, i32 %n) nounwind "frame-pointer"="all" {
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entry:
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%0 = add nsw i32 %n, -1 ; <i32> [#uses=2]
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%1 = icmp sgt i32 %0, 0 ; <i1> [#uses=1]
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br i1 %1, label %bb, label %return
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bb: ; preds = %bb, %entry
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%i.03 = phi i32 [ %tmp, %bb ], [ 0, %entry ] ; <i32> [#uses=3]
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%scevgep = getelementptr i32, i32* %a, i32 %i.03 ; <i32*> [#uses=1]
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%scevgep4 = getelementptr i32, i32* %b, i32 %i.03 ; <i32*> [#uses=1]
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%tmp = add i32 %i.03, 1 ; <i32> [#uses=3]
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%scevgep5 = getelementptr i32, i32* %a, i32 %tmp ; <i32*> [#uses=1]
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%2 = load i32, i32* %scevgep, align 4 ; <i32> [#uses=1]
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%3 = load i32, i32* %scevgep5, align 4 ; <i32> [#uses=1]
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%4 = add nsw i32 %3, %2 ; <i32> [#uses=1]
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store i32 %4, i32* %scevgep4, align 4
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%exitcond = icmp eq i32 %tmp, %0 ; <i1> [#uses=1]
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br i1 %exitcond, label %return, label %bb
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return: ; preds = %bb, %entry
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ret void
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}
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; rdar://13978317
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; Pair of loads not formed when lifetime markers are set.
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%struct.Test = type { i32, i32, i32 }
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@TestVar = external global %struct.Test
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; CHECK-LABEL: Func1:
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define void @Func1() nounwind ssp "frame-pointer"="all" {
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entry:
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; A8: movw [[BASER:r[0-9]+]], :lower16:{{.*}}TestVar{{.*}}
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; A8: movt [[BASER]], :upper16:{{.*}}TestVar{{.*}}
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; A8: ldr [[BASE:r[0-9]+]], {{\[}}[[BASER]]]
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; A8: ldrd [[FIELD1:r[0-9]+]], [[FIELD2:r[0-9]+]], {{\[}}[[BASE]], #4]
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; A8-NEXT: add [[FIELD2]], [[FIELD1]]
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; A8-NEXT: str [[FIELD2]], {{\[}}[[BASE]]{{\]}}
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; CONSERVATIVE-NOT: ldrd
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%orig_blocks = alloca [256 x i16], align 2
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%0 = bitcast [256 x i16]* %orig_blocks to i8*call void @llvm.lifetime.start.p0i8(i64 512, i8* %0) nounwind
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%tmp1 = load i32, i32* getelementptr inbounds (%struct.Test, %struct.Test* @TestVar, i32 0, i32 1), align 4
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%tmp2 = load i32, i32* getelementptr inbounds (%struct.Test, %struct.Test* @TestVar, i32 0, i32 2), align 4
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%add = add nsw i32 %tmp2, %tmp1
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store i32 %add, i32* getelementptr inbounds (%struct.Test, %struct.Test* @TestVar, i32 0, i32 0), align 4
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call void @llvm.lifetime.end.p0i8(i64 512, i8* %0) nounwind
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ret void
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}
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declare void @extfunc(i32, i32, i32, i32)
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; CHECK-LABEL: Func2:
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; CONSERVATIVE-NOT: ldrd
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; A8: ldrd
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; CHECK: bl{{x?}} _extfunc
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; A8: pop
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define void @Func2(i32* %p) "frame-pointer"="all" {
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entry:
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%addr0 = getelementptr i32, i32* %p, i32 0
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%addr1 = getelementptr i32, i32* %p, i32 1
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%v0 = load i32, i32* %addr0
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%v1 = load i32, i32* %addr1
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; try to force %v0/%v1 into non-adjacent registers
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call void @extfunc(i32 %v0, i32 0, i32 0, i32 %v1)
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ret void
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}
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; CHECK-LABEL: strd_spill_ldrd_reload:
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; A8: strd r1, r0, [sp, #-8]!
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; M3: strd r1, r0, [sp, #-8]!
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; BASIC: strd r1, r0, [sp, #-8]!
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; GREEDY: strd r0, r1, [sp, #-8]!
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; CONSERVATIVE: strd r0, r1, [sp, #-8]!
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; NORMAL: @ InlineAsm Start
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; NORMAL: @ InlineAsm End
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; A8: ldrd r2, r1, [sp]
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; M3: ldrd r2, r1, [sp]
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; BASIC: ldrd r2, r1, [sp]
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; GREEDY: ldrd r1, r2, [sp]
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; CONSERVATIVE: ldrd r1, r2, [sp]
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; CHECK: bl{{x?}} _extfunc
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define void @strd_spill_ldrd_reload(i32 %v0, i32 %v1) "frame-pointer"="all" {
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; force %v0 and %v1 to be spilled
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call void asm sideeffect "", "~{r0},~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{lr}"()
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; force the reloaded %v0, %v1 into different registers
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call void @extfunc(i32 0, i32 %v0, i32 %v1, i32 7)
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ret void
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}
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declare void @extfunc2(i32*, i32, i32)
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; CHECK-LABEL: ldrd_postupdate_dec:
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; NORMAL: ldrd r1, r2, [r0], #-8
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; CONSERVATIVE-NOT: ldrd
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; CHECK: bl{{x?}} _extfunc
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define void @ldrd_postupdate_dec(i32* %p0) "frame-pointer"="all" {
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%p0.1 = getelementptr i32, i32* %p0, i32 1
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%v0 = load i32, i32* %p0
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%v1 = load i32, i32* %p0.1
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%p1 = getelementptr i32, i32* %p0, i32 -2
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call void @extfunc2(i32* %p1, i32 %v0, i32 %v1)
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ret void
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}
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; CHECK-LABEL: ldrd_postupdate_inc:
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; NORMAL: ldrd r1, r2, [r0], #8
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; CONSERVATIVE-NOT: ldrd
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; CHECK: bl{{x?}} _extfunc
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define void @ldrd_postupdate_inc(i32* %p0) "frame-pointer"="all" {
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%p0.1 = getelementptr i32, i32* %p0, i32 1
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%v0 = load i32, i32* %p0
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%v1 = load i32, i32* %p0.1
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%p1 = getelementptr i32, i32* %p0, i32 2
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call void @extfunc2(i32* %p1, i32 %v0, i32 %v1)
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ret void
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}
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; CHECK-LABEL: strd_postupdate_dec:
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; NORMAL: strd r1, r2, [r0], #-8
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; CONSERVATIVE-NOT: strd
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; CHECK: bx lr
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define i32* @strd_postupdate_dec(i32* %p0, i32 %v0, i32 %v1) "frame-pointer"="all" {
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%p0.1 = getelementptr i32, i32* %p0, i32 1
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store i32 %v0, i32* %p0
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store i32 %v1, i32* %p0.1
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%p1 = getelementptr i32, i32* %p0, i32 -2
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ret i32* %p1
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}
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; CHECK-LABEL: strd_postupdate_inc:
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; NORMAL: strd r1, r2, [r0], #8
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; CONSERVATIVE-NOT: strd
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; CHECK: bx lr
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define i32* @strd_postupdate_inc(i32* %p0, i32 %v0, i32 %v1) "frame-pointer"="all" {
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%p0.1 = getelementptr i32, i32* %p0, i32 1
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store i32 %v0, i32* %p0
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store i32 %v1, i32* %p0.1
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%p1 = getelementptr i32, i32* %p0, i32 2
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ret i32* %p1
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}
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; CHECK-LABEL: ldrd_strd_aa:
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; NORMAL: ldrd [[TMP1:r[0-9]]], [[TMP2:r[0-9]]],
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; NORMAL: strd [[TMP1]], [[TMP2]],
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; CONSERVATIVE-NOT: ldrd
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; CONSERVATIVE-NOT: strd
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; CHECK: bx lr
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define void @ldrd_strd_aa(i32* noalias nocapture %x, i32* noalias nocapture readonly %y) {
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entry:
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%0 = load i32, i32* %y, align 4
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store i32 %0, i32* %x, align 4
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%arrayidx2 = getelementptr inbounds i32, i32* %y, i32 1
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%1 = load i32, i32* %arrayidx2, align 4
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%arrayidx3 = getelementptr inbounds i32, i32* %x, i32 1
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store i32 %1, i32* %arrayidx3, align 4
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ret void
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}
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; CHECK-LABEL: bitcast_ptr_ldr
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; CHECK-NOT: ldrd
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define i32 @bitcast_ptr_ldr(i16* %In) {
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entry:
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%0 = bitcast i16* %In to i32*
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%in.addr.0 = getelementptr inbounds i32, i32* %0, i32 0
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%in.addr.1 = getelementptr inbounds i32, i32* %0, i32 1
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%1 = load i32, i32* %in.addr.0, align 2
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%2 = load i32, i32* %in.addr.1, align 2
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%mul = mul i32 %1, %2
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ret i32 %mul
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}
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; CHECK-LABEL: bitcast_gep_ldr
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; CHECK-NOT: ldrd
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define i32 @bitcast_gep_ldr(i16* %In) {
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entry:
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%in.addr.0 = getelementptr inbounds i16, i16* %In, i32 0
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%in.addr.1 = getelementptr inbounds i16, i16* %In, i32 2
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%cast.0 = bitcast i16* %in.addr.0 to i32*
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%cast.1 = bitcast i16* %in.addr.1 to i32*
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%0 = load i32, i32* %cast.0, align 2
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%1 = load i32, i32* %cast.1, align 2
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%mul = mul i32 %0, %1
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ret i32 %mul
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}
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; CHECK-LABEL: bitcast_ptr_str
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; CHECK-NOT: strd
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define void @bitcast_ptr_str(i32 %arg0, i32 %arg1, i16* %out) {
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entry:
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%0 = bitcast i16* %out to i32*
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%out.addr.0 = getelementptr inbounds i32, i32* %0, i32 0
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%out.addr.1 = getelementptr inbounds i32, i32* %0, i32 1
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store i32 %arg0, i32* %out.addr.0, align 2
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store i32 %arg1, i32* %out.addr.1, align 2
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ret void
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}
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; CHECK-LABEL: bitcast_gep_str
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; CHECK-NOT: strd
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define void @bitcast_gep_str(i32 %arg0, i32 %arg1, i16* %out) {
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entry:
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%out.addr.0 = getelementptr inbounds i16, i16* %out, i32 0
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%out.addr.1 = getelementptr inbounds i16, i16* %out, i32 2
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%cast.0 = bitcast i16* %out.addr.0 to i32*
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%cast.1 = bitcast i16* %out.addr.1 to i32*
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store i32 %arg0, i32* %cast.0, align 2
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store i32 %arg1, i32* %cast.1, align 2
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ret void
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}
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declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture) nounwind
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declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) nounwind
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