Evan Cheng 9a33fc17be Avoid creating a cycle when folding load / op with flag / store. PR11451474. rdar://11451474 ... llvm-svn: 156896		2012-05-16 01:54:27 +00:00
..
ARM	Enable sub-sub-register copy coalescing.	2012-05-15 23:31:35 +00:00
CellSPU	Flip the new block-placement pass to be on by default.	2012-04-16 13:49:17 +00:00
CPP
Generic	change the objectsize intrinsic signature: add a 3rd parameter to denote the maximum runtime performance penalty that the user is willing to accept.	2012-05-09 15:52:43 +00:00
Hexagon	Enable all Hexagon tests.	2012-05-15 16:13:12 +00:00
MBlaze
Mips	Fix test cases.	2012-05-12 03:25:16 +00:00
MSP430
NVPTX	This patch adds a new NVPTX back-end to LLVM which supports code generation for NVIDIA PTX 3.0. This back-end will (eventually) replace the current PTX back-end, while maintaining compatibility with it.	2012-05-04 20:18:50 +00:00
PowerPC	Remove dead SD nodes after the combining pass. Fixes PR12201.	2012-04-16 03:33:22 +00:00
PTX
SPARC	Regression test for PR2960.	2012-05-01 11:11:34 +00:00
Thumb	Make test less fragile.	2012-04-27 20:48:18 +00:00
Thumb2	Added a regress test for the bug #9964 before close it.	2012-05-09 19:07:04 +00:00
X86	Avoid creating a cycle when folding load / op with flag / store. PR11451474. rdar://11451474	2012-05-16 01:54:27 +00:00
XCore	Flip the new block-placement pass to be on by default.	2012-04-16 13:49:17 +00:00