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llvm-mirror/test/CodeGen/X86/2009-07-07-SplitICmp.ll
Chris Lattner ad85635a93 now that generic vector types aren't selected onto MMX registers, these
tests don't need -disable-mmx.

llvm-svn: 122188
2010-12-19 20:12:58 +00:00

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LLVM

; RUN: llc < %s -march=x86
define void @test2(<2 x i32> %A, <2 x i32> %B, <2 x i32>* %C) nounwind {
%D = icmp sgt <2 x i32> %A, %B
%E = zext <2 x i1> %D to <2 x i32>
store <2 x i32> %E, <2 x i32>* %C
ret void
}