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02f7297367
Utilizing the 8 and 16 bit comparison instructions, even when an input can be folded into the comparison instruction itself, is typically not worth it. There are too many partial register stalls as a result, leading to significant slowdowns. By always performing comparisons on at least 32-bit registers, performance of the calculation chain leading to the comparison improves. Continue to use the smaller comparisons when minimizing size, as that allows better folding of loads into the comparison instructions. rdar://15386341 llvm-svn: 195496
41 lines
985 B
LLVM
41 lines
985 B
LLVM
; RUN: llc -march=x86-64 -mcpu=corei7 < %s | FileCheck %s
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declare i64 @llvm.ctpop.i64(i64) nounwind readnone
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define i32 @test1(i64 %x) nounwind readnone {
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%count = tail call i64 @llvm.ctpop.i64(i64 %x)
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%cast = trunc i64 %count to i32
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%cmp = icmp ugt i32 %cast, 1
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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; CHECK-LABEL: test1:
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; CHECK: leaq -1([[A0:%rdi|%rcx]])
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; CHECK-NEXT: testq
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; CHECK-NEXT: setne
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; CHECK: ret
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}
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define i32 @test2(i64 %x) nounwind readnone {
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%count = tail call i64 @llvm.ctpop.i64(i64 %x)
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%cmp = icmp ult i64 %count, 2
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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; CHECK-LABEL: test2:
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; CHECK: leaq -1([[A0]])
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; CHECK-NEXT: testq
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; CHECK-NEXT: sete
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; CHECK: ret
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}
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define i32 @test3(i64 %x) nounwind readnone {
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%count = tail call i64 @llvm.ctpop.i64(i64 %x)
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%cast = trunc i64 %count to i6 ; Too small for 0-64
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%cmp = icmp ult i6 %cast, 2
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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; CHECK-LABEL: test3:
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; CHECK: cmpl $2
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; CHECK: ret
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}
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