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be split and the result type widened. When the condition of a vselect has to be split it makes no sense widening the vselect and thereby widening the condition. We end up in an endless loop of widening (vselect result type) and splitting (condition mask type) doing this. Instead, split both the condition and the vselect and widen the result. I ran this over the test suite with i686 and mattr=+sse and saw no regressions. Fixes PR18036. llvm-svn: 203311
60 lines
2.0 KiB
LLVM
60 lines
2.0 KiB
LLVM
; Tests for SSE1 and below, without SSE2+.
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; RUN: llc < %s -march=x86 -mcpu=pentium3 -O3 | FileCheck %s
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; RUN: llc < %s -march=x86-64 -mattr=-sse2,+sse -O3 | FileCheck %s
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define <8 x i16> @test1(<8 x i32> %a) nounwind {
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; CHECK: test1
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ret <8 x i16> zeroinitializer
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}
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define <8 x i16> @test2(<8 x i32> %a) nounwind {
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; CHECK: test2
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%c = trunc <8 x i32> %a to <8 x i16> ; <<8 x i16>> [#uses=1]
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ret <8 x i16> %c
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}
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; PR7993
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;define <4 x i32> @test3(<4 x i16> %a) nounwind {
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; %c = sext <4 x i16> %a to <4 x i32> ; <<4 x i32>> [#uses=1]
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; ret <4 x i32> %c
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;}
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; This should not emit shuffles to populate the top 2 elements of the 4-element
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; vector that this ends up returning.
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; rdar://8368414
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define <2 x float> @test4(<2 x float> %A, <2 x float> %B) nounwind {
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entry:
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%tmp7 = extractelement <2 x float> %A, i32 0
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%tmp5 = extractelement <2 x float> %A, i32 1
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%tmp3 = extractelement <2 x float> %B, i32 0
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%tmp1 = extractelement <2 x float> %B, i32 1
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%add.r = fadd float %tmp7, %tmp3
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%add.i = fsub float %tmp5, %tmp1
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%tmp11 = insertelement <2 x float> undef, float %add.r, i32 0
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%tmp9 = insertelement <2 x float> %tmp11, float %add.i, i32 1
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ret <2 x float> %tmp9
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; CHECK-LABEL: test4:
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; CHECK-NOT: shufps $16
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; CHECK: shufps $1,
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; CHECK-NOT: shufps $16
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; CHECK: shufps $1,
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; CHECK-NOT: shufps $16
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; CHECK: unpcklps
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; CHECK-NOT: shufps $16
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; CHECK: ret
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}
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; We used to get stuck in type legalization for this example when lowering the
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; vselect. With SSE1 v4f32 is a legal type but v4i1 (or any vector integer type)
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; is not. We used to ping pong between splitting the vselect for the v4i
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; condition operand and widening the resulting vselect for the v4f32 result.
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; PR18036
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; CHECK-LABEL: vselect
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define <4 x float> @vselect(<4 x float>*%p, <4 x i32> %q) {
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entry:
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%a1 = icmp eq <4 x i32> %q, zeroinitializer
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%a14 = select <4 x i1> %a1, <4 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+0> , <4 x float> zeroinitializer
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ret <4 x float> %a14
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}
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