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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 03:02:36 +01:00
llvm-mirror/test/MC/Disassembler
Amy Kwan 3ee1bf0ca0 [PowerPC] Add Vector Extract/Expand/Count with Mask, Move to VSR Mask Instruction Definitions and MC Tests
This patch adds the instruction definitions and assembly/disassembly tests for
the following set of instructions:

Vector Extract [byte | half | word | doubleword | quad] with mask
Vector Expand [byte | half | word | doubleword | quad] with mask
Move to VSR [byte | byte immediate | half | word | doubleword | quad] with mask
Vector Count Mask Bits [byte | half | word | doubleword]

Differential Revision: https://reviews.llvm.org/D83724
2020-08-07 11:02:08 -05:00
..
AArch64 [ARM] Add Cortex-A78 and Cortex-X1 Support for Clang and LLVM 2020-07-10 18:24:11 +01:00
AMDGPU [AMDGPU] gfx1031 target 2020-08-05 12:36:26 -07:00
ARC
ARM [ARM] Fix Asm/Disasm of TBB/TBH instructions 2020-07-22 09:31:56 +01:00
Hexagon
Lanai
Mips
MSP430
PowerPC [PowerPC] Add Vector Extract/Expand/Count with Mask, Move to VSR Mask Instruction Definitions and MC Tests 2020-08-07 11:02:08 -05:00
RISCV
Sparc
SystemZ
WebAssembly
X86 [X86-64] Support Intel AMX instructions 2020-07-02 08:57:04 +08:00
XCore