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2f13163a84
This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. llvm-svn: 205090
16 lines
415 B
LLVM
16 lines
415 B
LLVM
; RUN: llc < %s -march=arm64
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; Make sure we are not crashing on this test.
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define void @autogen_SD13158() {
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entry:
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%B26 = frem float 0.000000e+00, undef
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br i1 undef, label %CF, label %CF77
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CF: ; preds = %CF, %CF76
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store float %B26, float* undef
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br i1 undef, label %CF, label %CF77
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CF77: ; preds = %CF
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ret void
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}
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