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2f13163a84
This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. llvm-svn: 205090
12 lines
238 B
LLVM
12 lines
238 B
LLVM
; RUN: llc < %s -march=arm64 | FileCheck %s
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define i64 @foo(i32 %a, i32 %b) nounwind readnone ssp {
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entry:
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; CHECK-LABEL: foo:
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; CHECK: add w0, w1, w0
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; CHECK: ret
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%add = add i32 %b, %a
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%conv = zext i32 %add to i64
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ret i64 %conv
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}
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