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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 04:02:41 +01:00
llvm-mirror/test/CodeGen
2009-08-05 02:25:11 +00:00
..
Alpha Make promotion in operation legalization for SETCC work correctly. 2009-07-17 05:16:04 +00:00
ARM Convert more Neon tests to use FileCheck. 2009-08-04 22:01:41 +00:00
Blackfin LowerSubregsInstructionPass::LowerExtract should not extend the live range of registers. 2009-08-04 20:01:11 +00:00
CBackend Fix an erroneous check for isFNeg; the FNeg case is handled 2009-06-04 23:43:29 +00:00
CellSPU Add some generic expansion logic for SMULO and UMULO. Fixes UMULO 2009-06-16 06:58:29 +00:00
CPP Fix code emission for conditional branches. 2009-05-04 19:10:38 +00:00
Generic Remove the IA-64 backend. 2009-07-24 00:30:09 +00:00
Mips Pass target triple string in to TargetMachine constructor. 2009-08-03 04:03:51 +00:00
MSP430 Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
PIC16 Test case to check that separate section is created for a global variable specified with section attribute. 2009-07-27 16:20:41 +00:00
PowerPC Revert r75663 (and r76805), as it is causing regressions on powerpc. 2009-07-23 00:09:46 +00:00
SPARC Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
SystemZ convert this test to filecheck format, which is faster and avoids false matches of "st" -> "stdin" 2009-07-21 17:36:24 +00:00
Thumb tADDrSPI doesn't have a predicate operand, but tADDhirr and tADDi3 have. 2009-07-28 07:38:35 +00:00
Thumb2 One more. Transfer kill of the larger register when lowering an EXTRACT_SUBREG. 2009-08-05 02:25:11 +00:00
X86 Major calling convention code refactoring. 2009-08-05 01:29:28 +00:00
XCore Add extra SEXT pattern. 2009-08-02 22:45:24 +00:00