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https://github.com/RPCS3/llvm-mirror.git
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113 lines
5.4 KiB
LLVM
113 lines
5.4 KiB
LLVM
; RUN: llc -march=hexagon < %s | FileCheck %s
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;
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; Check that we no longer generate 4 inserts.
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; CHECK: combine(r{{[0-9]+}}.l,r{{[0-9]+}}.l)
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; CHECK: combine(r{{[0-9]+}}.l,r{{[0-9]+}}.l)
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; CHECK-NOT: insert
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target datalayout = "e-p:32:32:32-i64:64:64-i32:32:32-i16:16:16-i1:32:32-f64:64:64-f32:32:32-v64:64:64-v32:32:32-a0:0-n16:32"
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target triple = "hexagon"
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%struct.a = type { i16 }
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define i32 @fun(%struct.a* nocapture %pData, i64 %c, i64* nocapture %d, i64* nocapture %e, i64* nocapture %f) #0 {
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entry:
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%g = getelementptr inbounds %struct.a, %struct.a* %pData, i32 0, i32 0
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%0 = load i16, i16* %g, align 2, !tbaa !0
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%conv185 = sext i16 %0 to i32
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%shr86 = ashr i32 %conv185, 2
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%cmp87 = icmp sgt i32 %shr86, 0
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br i1 %cmp87, label %for.body.lr.ph, label %for.end
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for.body.lr.ph: ; preds = %entry
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%h.sroa.0.0.extract.trunc = trunc i64 %c to i32
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%sext = shl i32 %h.sroa.0.0.extract.trunc, 16
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%conv8 = ashr exact i32 %sext, 16
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%l.sroa.2.4.extract.shift = lshr i64 %c, 32
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%sext76 = ashr i32 %h.sroa.0.0.extract.trunc, 16
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%m.sroa.2.6.extract.shift = lshr i64 %c, 48
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%sext7980 = shl nuw nsw i64 %l.sroa.2.4.extract.shift, 16
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%sext79 = trunc i64 %sext7980 to i32
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%conv38 = ashr exact i32 %sext79, 16
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%sext8283 = shl nuw nsw i64 %m.sroa.2.6.extract.shift, 16
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%sext82 = trunc i64 %sext8283 to i32
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%conv53 = ashr exact i32 %sext82, 16
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br label %for.body
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for.body: ; preds = %for.body.lr.ph, %for.body
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%arrayidx.phi = phi i64* [ %d, %for.body.lr.ph ], [ %arrayidx.inc, %for.body ]
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%arrayidx30.phi = phi i64* [ %f, %for.body.lr.ph ], [ %arrayidx30.inc, %for.body ]
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%arrayidx60.phi = phi i64* [ %e, %for.body.lr.ph ], [ %arrayidx60.inc, %for.body ]
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%j.088.pmt = phi i32 [ 0, %for.body.lr.ph ], [ %inc.pmt, %for.body ]
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%1 = load i64, i64* %arrayidx.phi, align 8, !tbaa !1
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%n_union3.sroa.0.0.extract.trunc = trunc i64 %1 to i32
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%n_union3.sroa.1.4.extract.shift = lshr i64 %1, 32
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%2 = tail call i64 @llvm.hexagon.M2.dpmpyss.s0(i32 %n_union3.sroa.0.0.extract.trunc, i32 %conv8)
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%3 = tail call i64 @llvm.hexagon.S2.asl.r.p(i64 %2, i32 -25)
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%conv9 = trunc i64 %3 to i32
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%4 = tail call i32 @llvm.hexagon.A2.sath(i32 %conv9)
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%n_union13.sroa.1.4.extract.trunc = trunc i64 %n_union3.sroa.1.4.extract.shift to i32
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%5 = tail call i64 @llvm.hexagon.M2.dpmpyss.s0(i32 %n_union13.sroa.1.4.extract.trunc, i32 %sext76)
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%6 = tail call i64 @llvm.hexagon.S2.asl.r.p(i64 %5, i32 -25)
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%conv24 = trunc i64 %6 to i32
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%7 = tail call i32 @llvm.hexagon.A2.sath(i32 %conv24)
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%8 = load i64, i64* %arrayidx30.phi, align 8, !tbaa !1
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%n_union28.sroa.0.0.extract.trunc = trunc i64 %8 to i32
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%n_union28.sroa.1.4.extract.shift = lshr i64 %8, 32
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%9 = tail call i64 @llvm.hexagon.M2.dpmpyss.s0(i32 %n_union28.sroa.0.0.extract.trunc, i32 %conv38)
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%10 = tail call i64 @llvm.hexagon.S2.asl.r.p(i64 %9, i32 -25)
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%conv39 = trunc i64 %10 to i32
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%11 = tail call i32 @llvm.hexagon.A2.sath(i32 %conv39)
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%n_union43.sroa.1.4.extract.trunc = trunc i64 %n_union28.sroa.1.4.extract.shift to i32
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%12 = tail call i64 @llvm.hexagon.M2.dpmpyss.s0(i32 %n_union43.sroa.1.4.extract.trunc, i32 %conv53)
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%13 = tail call i64 @llvm.hexagon.S2.asl.r.p(i64 %12, i32 -25)
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%conv54 = trunc i64 %13 to i32
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%14 = tail call i32 @llvm.hexagon.A2.sath(i32 %conv54)
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%n_union.sroa.3.6.insert.ext = zext i32 %14 to i64
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%n_union.sroa.3.6.insert.shift = shl i64 %n_union.sroa.3.6.insert.ext, 48
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%conv40.mask = and i32 %11, 65535
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%n_union.sroa.2.4.insert.ext = zext i32 %conv40.mask to i64
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%n_union.sroa.2.4.insert.shift = shl nuw nsw i64 %n_union.sroa.2.4.insert.ext, 32
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%conv25.mask = and i32 %7, 65535
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%n_union.sroa.1.2.insert.ext = zext i32 %conv25.mask to i64
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%n_union.sroa.1.2.insert.shift = shl nuw nsw i64 %n_union.sroa.1.2.insert.ext, 16
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%conv10.mask = and i32 %4, 65535
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%n_union.sroa.0.0.insert.ext = zext i32 %conv10.mask to i64
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%n_union.sroa.2.4.insert.insert = or i64 %n_union.sroa.1.2.insert.shift, %n_union.sroa.0.0.insert.ext
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%n_union.sroa.1.2.insert.insert = or i64 %n_union.sroa.2.4.insert.insert, %n_union.sroa.2.4.insert.shift
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%n_union.sroa.0.0.insert.insert = or i64 %n_union.sroa.1.2.insert.insert, %n_union.sroa.3.6.insert.shift
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%15 = load i64, i64* %arrayidx60.phi, align 8, !tbaa !1
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%16 = tail call i64 @llvm.hexagon.A2.vaddhs(i64 %15, i64 %n_union.sroa.0.0.insert.insert)
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store i64 %16, i64* %arrayidx60.phi, align 8, !tbaa !1
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%inc.pmt = add i32 %j.088.pmt, 1
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%17 = load i16, i16* %g, align 2, !tbaa !0
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%conv1 = sext i16 %17 to i32
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%shr = ashr i32 %conv1, 2
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%cmp = icmp slt i32 %inc.pmt, %shr
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%arrayidx.inc = getelementptr i64, i64* %arrayidx.phi, i32 1
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%arrayidx30.inc = getelementptr i64, i64* %arrayidx30.phi, i32 1
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%arrayidx60.inc = getelementptr i64, i64* %arrayidx60.phi, i32 1
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br i1 %cmp, label %for.body, label %for.end.loopexit
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for.end.loopexit: ; preds = %for.body
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br label %for.end
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for.end: ; preds = %for.end.loopexit, %entry
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ret i32 0
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}
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declare i32 @llvm.hexagon.A2.sath(i32) #1
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declare i64 @llvm.hexagon.S2.asl.r.p(i64, i32) #1
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declare i64 @llvm.hexagon.M2.dpmpyss.s0(i32, i32) #1
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declare i64 @llvm.hexagon.A2.vaddhs(i64, i64) #1
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attributes #0 = { nounwind "fp-contract-model"="standard" "no-frame-pointer-elim-non-leaf" "realign-stack" "relocation-model"="static" "ssp-buffers-size"="8" }
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attributes #1 = { nounwind readnone }
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!0 = !{!"short", !1}
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!1 = !{!"omnipotent char", !2}
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!2 = !{!"Simple C/C++ TBAA"}
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