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llvm-mirror/test/CodeGen/Hexagon/postinc-offset.ll
Krzysztof Parzyszek db3c93e416 [Hexagon] Simplify CFG after atomic expansion
This will remove suboptimal branching from the generated ll/sc loops.
The extra simplification pass affects a lot of testcases, which have
been modified to accommodate this change: either by modifying the
test to become immune to the CFG simplification, or (less preferablt)
by adding option -hexagon-initial-cfg-clenaup=0.

llvm-svn: 338774
2018-08-02 22:17:53 +00:00

44 lines
1.4 KiB
LLVM

; RUN: llc -enable-aa-sched-mi -march=hexagon -mcpu=hexagonv5 -rdf-opt=0 \
; RUN: < %s | FileCheck %s
; CHECK: {
; CHECK: = memd([[REG0:(r[0-9]+)]]++#8)
; CHECK-NOT: memw([[REG0]]+#0) =
; CHECK: }
define void @f0(i32* %a0) #0 {
b0:
store i32 -1, i32* %a0, align 8, !tbaa !0
br label %b4
b1: ; preds = %b3
unreachable
b2: ; preds = %b3
ret void
b3: ; preds = %b4
%v0 = extractelement <2 x i32> %v6, i32 1
br i1 undef, label %b2, label %b1
b4: ; preds = %b4, %b0
%v1 = phi <2 x i32> [ %v6, %b4 ], [ zeroinitializer, %b0 ]
%v2 = phi i32* [ %v9, %b4 ], [ %a0, %b0 ]
%v3 = phi i32 [ %v7, %b4 ], [ 0, %b0 ]
%v4 = bitcast i32* %v2 to <2 x i32>*
%v5 = load <2 x i32>, <2 x i32>* %v4, align 8
%v6 = add <2 x i32> %v5, %v1
%v7 = add nsw i32 %v3, 2
%v8 = icmp slt i32 %v3, 4
%v9 = getelementptr i32, i32* %v2, i32 2
br i1 %v8, label %b4, label %b3
}
attributes #0 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
!0 = !{!1, !1, i64 0}
!1 = !{!"int", !2}
!2 = !{!"omnipotent char", !3}
!3 = !{!"Simple C/C++ TBAA"}