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c168815f4b
Summary: The -mcpu=mips16 option caused the Integrated Assembler to crash because it couldn't figure out the architecture revision number to write to the .MIPS.abiflags section. This CPU definition has been removed because, like microMIPS, MIPS16 is an ASE to a base architecture. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13656 llvm-svn: 250407
16 lines
412 B
LLVM
16 lines
412 B
LLVM
; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=PIC16
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@f.i = internal thread_local unnamed_addr global i32 1, align 4
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define i8* @f(i8* nocapture %a) nounwind {
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entry:
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%0 = load i32, i32* @f.i, align 4
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%inc = add nsw i32 %0, 1
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store i32 %inc, i32* @f.i, align 4
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%1 = inttoptr i32 %inc to i8*
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; PIC16: addiu ${{[0-9]+}}, %tlsldm(f.i)
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ret i8* %1
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}
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