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llvm-mirror/test/CodeGen/ARM/no-cmov2bfi.ll
Pirama Arumuga Nainar fdf9c3959d [ARM] Fix computeKnownBits for ARMISD::CMOV
Summary:
The true and false operands for the CMOV are operands 0 and 1.
ARMISelLowering.cpp::computeKnownBits was looking at operands 1 and 2
instead.  This can cause CMOV instructions to be incorrectly folded into
BFI if value set by the CMOV is another CMOV, whose known bits are
computed incorrectly.

This patch fixes the issue and adds a test case.

Reviewers: kristof.beyls, jmolloy

Subscribers: llvm-commits, aemerson, srhines, rengolin

Differential Revision: https://reviews.llvm.org/D31265

llvm-svn: 298624
2017-03-23 16:47:47 +00:00

20 lines
499 B
LLVM

; RUN: llc < %s -mtriple=thumbv7 | FileCheck --check-prefix=CHECK-NOBFI %s
declare zeroext i1 @dummy()
define i8 @test(i8 %a1, i1 %c) {
; CHECK-NOBFI-NOT: bfi
; CHECK-NOBFI: bl dummy
; CHECK-NOBFI: cmp r0, #0
; CHECK-NOBFI: it ne
; CHECK-NOBFI: orrne [[REG:r[0-9]+]], [[REG]], #8
; CHECK-NOBFI: mov r0, [[REG]]
%1 = and i8 %a1, -9
%2 = select i1 %c, i8 %1, i8 %a1
%3 = tail call zeroext i1 @dummy()
%4 = or i8 %2, 8
%ret = select i1 %3, i8 %4, i8 %2
ret i8 %ret
}