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7e501cf4c3
This update was done with the following bash script:
find test/CodeGen -name "*.ll" | \
while read NAME; do
echo "$NAME"
if ! grep -q "^; *RUN: *llc.*debug" $NAME; then
TEMP=`mktemp -t temp`
cp $NAME $TEMP
sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \
while read FUNC; do
sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP
done
sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP
sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP
sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP
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mv $TEMP $NAME
fi
done
llvm-svn: 186280
129 lines
2.9 KiB
LLVM
129 lines
2.9 KiB
LLVM
; Test 64-bit additions of constants to memory.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; Check additions of 1.
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define void @f1(i64 *%ptr) {
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; CHECK-LABEL: f1:
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; CHECK: agsi 0(%r2), 1
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; CHECK: br %r14
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%val = load i64 *%ptr
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%add = add i64 %val, 127
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store i64 %add, i64 *%ptr
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ret void
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}
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; Check the high end of the constant range.
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define void @f2(i64 *%ptr) {
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; CHECK-LABEL: f2:
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; CHECK: agsi 0(%r2), 127
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; CHECK: br %r14
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%val = load i64 *%ptr
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%add = add i64 %val, 127
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store i64 %add, i64 *%ptr
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ret void
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}
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; Check the next constant up, which must use an addition and a store.
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; Both LG/AGHI and LGHI/AG would be OK.
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define void @f3(i64 *%ptr) {
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; CHECK-LABEL: f3:
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; CHECK-NOT: agsi
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; CHECK: stg %r0, 0(%r2)
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; CHECK: br %r14
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%val = load i64 *%ptr
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%add = add i64 %val, 128
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store i64 %add, i64 *%ptr
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ret void
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}
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; Check the low end of the constant range.
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define void @f4(i64 *%ptr) {
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; CHECK-LABEL: f4:
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; CHECK: agsi 0(%r2), -128
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; CHECK: br %r14
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%val = load i64 *%ptr
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%add = add i64 %val, -128
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store i64 %add, i64 *%ptr
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ret void
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}
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; Check the next value down, with the same comment as f3.
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define void @f5(i64 *%ptr) {
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; CHECK-LABEL: f5:
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; CHECK-NOT: agsi
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; CHECK: stg %r0, 0(%r2)
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; CHECK: br %r14
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%val = load i64 *%ptr
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%add = add i64 %val, -129
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store i64 %add, i64 *%ptr
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ret void
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}
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; Check the high end of the aligned AGSI range.
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define void @f6(i64 *%base) {
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; CHECK-LABEL: f6:
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; CHECK: agsi 524280(%r2), 1
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; CHECK: br %r14
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%ptr = getelementptr i64 *%base, i64 65535
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%val = load i64 *%ptr
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%add = add i64 %val, 1
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store i64 %add, i64 *%ptr
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ret void
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}
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; Check the next doubleword up, which must use separate address logic.
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; Other sequences besides this one would be OK.
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define void @f7(i64 *%base) {
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; CHECK-LABEL: f7:
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; CHECK: agfi %r2, 524288
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; CHECK: agsi 0(%r2), 1
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; CHECK: br %r14
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%ptr = getelementptr i64 *%base, i64 65536
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%val = load i64 *%ptr
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%add = add i64 %val, 1
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store i64 %add, i64 *%ptr
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ret void
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}
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; Check the low end of the AGSI range.
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define void @f8(i64 *%base) {
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; CHECK-LABEL: f8:
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; CHECK: agsi -524288(%r2), 1
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; CHECK: br %r14
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%ptr = getelementptr i64 *%base, i64 -65536
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%val = load i64 *%ptr
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%add = add i64 %val, 1
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store i64 %add, i64 *%ptr
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ret void
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}
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; Check the next doubleword down, which must use separate address logic.
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; Other sequences besides this one would be OK.
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define void @f9(i64 *%base) {
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; CHECK-LABEL: f9:
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; CHECK: agfi %r2, -524296
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; CHECK: agsi 0(%r2), 1
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; CHECK: br %r14
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%ptr = getelementptr i64 *%base, i64 -65537
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%val = load i64 *%ptr
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%add = add i64 %val, 1
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store i64 %add, i64 *%ptr
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ret void
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}
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; Check that AGSI does not allow indices.
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define void @f10(i64 %base, i64 %index) {
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; CHECK-LABEL: f10:
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; CHECK: agr %r2, %r3
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; CHECK: agsi 8(%r2), 1
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; CHECK: br %r14
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%add1 = add i64 %base, %index
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%add2 = add i64 %add1, 8
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%ptr = inttoptr i64 %add2 to i64 *
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%val = load i64 *%ptr
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%add = add i64 %val, 1
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store i64 %add, i64 *%ptr
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ret void
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}
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