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9b9d87ef99
This also fixes a bug in the predication of LR to LOCR: I'd forgotten that with these in-place instruction builds, the implicit operands need to be added manually. I think this was latent until now, but is tested by int-cmp-45.c. It also adds a CC valid mask to STOC, again tested by int-cmp-45.c. llvm-svn: 187573
116 lines
2.9 KiB
LLVM
116 lines
2.9 KiB
LLVM
; Test that compares are ommitted if CC already has the right value
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; (z196 version).
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
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; Addition provides enough for equality comparisons with zero. First teest
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; the EQ case with LOC.
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define i32 @f1(i32 %a, i32 %b, i32 *%cptr) {
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; CHECK-LABEL: f1:
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; CHECK: afi %r2, 1000000
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; CHECK-NEXT: loce %r3, 0(%r4)
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; CHECK: br %r14
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%add = add i32 %a, 1000000
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%cmp = icmp eq i32 %add, 0
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%c = load i32 *%cptr
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%arg = select i1 %cmp, i32 %c, i32 %b
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call void asm sideeffect "blah $0", "{r3}"(i32 %arg)
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ret i32 %add
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}
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; ...and again with STOC.
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define i32 @f2(i32 %a, i32 %b, i32 *%cptr) {
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; CHECK-LABEL: f2:
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; CHECK: afi %r2, 1000000
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; CHECK-NEXT: stoce %r3, 0(%r4)
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; CHECK: br %r14
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%add = add i32 %a, 1000000
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%cmp = icmp eq i32 %add, 0
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%c = load i32 *%cptr
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%newval = select i1 %cmp, i32 %b, i32 %c
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store i32 %newval, i32 *%cptr
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ret i32 %add
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}
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; Reverse the select order and test with LOCR.
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define i32 @f3(i32 %a, i32 %b, i32 %c) {
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; CHECK-LABEL: f3:
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; CHECK: afi %r2, 1000000
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; CHECK-NEXT: locrne %r3, %r4
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; CHECK: br %r14
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%add = add i32 %a, 1000000
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%cmp = icmp eq i32 %add, 0
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%arg = select i1 %cmp, i32 %b, i32 %c
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call void asm sideeffect "blah $0", "{r3}"(i32 %arg)
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ret i32 %add
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}
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; ...and again with LOC.
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define i32 @f4(i32 %a, i32 %b, i32 *%cptr) {
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; CHECK-LABEL: f4:
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; CHECK: afi %r2, 1000000
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; CHECK-NEXT: locne %r3, 0(%r4)
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; CHECK: br %r14
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%add = add i32 %a, 1000000
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%cmp = icmp eq i32 %add, 0
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%c = load i32 *%cptr
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%arg = select i1 %cmp, i32 %b, i32 %c
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call void asm sideeffect "blah $0", "{r3}"(i32 %arg)
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ret i32 %add
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}
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; ...and again with STOC.
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define i32 @f5(i32 %a, i32 %b, i32 *%cptr) {
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; CHECK-LABEL: f5:
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; CHECK: afi %r2, 1000000
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; CHECK-NEXT: stocne %r3, 0(%r4)
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; CHECK: br %r14
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%add = add i32 %a, 1000000
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%cmp = icmp eq i32 %add, 0
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%c = load i32 *%cptr
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%newval = select i1 %cmp, i32 %c, i32 %b
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store i32 %newval, i32 *%cptr
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ret i32 %add
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}
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; Change the EQ in f3 to NE.
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define i32 @f6(i32 %a, i32 %b, i32 %c) {
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; CHECK-LABEL: f6:
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; CHECK: afi %r2, 1000000
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; CHECK-NEXT: locre %r3, %r4
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; CHECK: br %r14
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%add = add i32 %a, 1000000
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%cmp = icmp ne i32 %add, 0
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%arg = select i1 %cmp, i32 %b, i32 %c
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call void asm sideeffect "blah $0", "{r3}"(i32 %arg)
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ret i32 %add
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}
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; ...and again with LOC.
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define i32 @f7(i32 %a, i32 %b, i32 *%cptr) {
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; CHECK-LABEL: f7:
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; CHECK: afi %r2, 1000000
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; CHECK-NEXT: loce %r3, 0(%r4)
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; CHECK: br %r14
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%add = add i32 %a, 1000000
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%cmp = icmp ne i32 %add, 0
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%c = load i32 *%cptr
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%arg = select i1 %cmp, i32 %b, i32 %c
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call void asm sideeffect "blah $0", "{r3}"(i32 %arg)
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ret i32 %add
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}
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; ...and again with STOC.
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define i32 @f8(i32 %a, i32 %b, i32 *%cptr) {
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; CHECK-LABEL: f8:
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; CHECK: afi %r2, 1000000
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; CHECK-NEXT: stoce %r3, 0(%r4)
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; CHECK: br %r14
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%add = add i32 %a, 1000000
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%cmp = icmp ne i32 %add, 0
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%c = load i32 *%cptr
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%newval = select i1 %cmp, i32 %c, i32 %b
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store i32 %newval, i32 *%cptr
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ret i32 %add
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}
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