Andrew Savonichev 064cc1a22c [MCA] Add support for in-order CPUs ... This patch adds a pipeline to support in-order CPUs such as ARM Cortex-A55. In-order pipeline implements a simplified version of Dispatch, Scheduler and Execute stages as a single stage. Entry and Retire stages are common for both in-order and out-of-order pipelines. Differential Revision: https://reviews.llvm.org/D94928		2021-03-04 14:08:19 +03:00
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HardwareUnits	[MCA] Add support for in-order CPUs	2021-03-04 14:08:19 +03:00
Stages	[MCA] Add support for in-order CPUs	2021-03-04 14:08:19 +03:00
CMakeLists.txt	[MCA] Add support for in-order CPUs	2021-03-04 14:08:19 +03:00
CodeEmitter.cpp	[MC][Bugfix] Remove redundant parameter for relaxInstruction	2020-04-21 11:06:55 +08:00
Context.cpp	[MCA] Add support for in-order CPUs	2021-03-04 14:08:19 +03:00
HWEventListener.cpp
InstrBuilder.cpp	[MCA] Add support for in-order CPUs	2021-03-04 14:08:19 +03:00
Instruction.cpp
Pipeline.cpp	Revert "Remove redundant "std::move"s in return statements"	2020-02-10 07:07:40 -08:00
Support.cpp