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d654e7d40c
Enable enableMultipleCopyHints() on X86. Original Patch by @jonpa: While enabling the mischeduler for SystemZ, it was discovered that for some reason a test needed one extra seemingly needless COPY (test/CodeGen/SystemZ/call-03.ll). The handling for that is resulted in this patch, which improves the register coalescing by providing not just one copy hint, but a sorted list of copy hints. On SystemZ, this gives ~12500 less register moves on SPEC, as well as marginally less spilling. Instead of improving just the SystemZ backend, the improvement has been implemented in common-code (calculateSpillWeightAndHint(). This gives a lot of test failures, but since this should be a general improvement I hope that the involved targets will help and review the test updates. Differential Revision: https://reviews.llvm.org/D38128 llvm-svn: 342578
341 lines
7.7 KiB
LLVM
341 lines
7.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-apple-darwin10 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=X32
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; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=X64
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define i8 @test1(i8 %x) nounwind {
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; X32-LABEL: test1:
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; X32: ## %bb.0:
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; X32-NEXT: movb {{[0-9]+}}(%esp), %al
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; X32-NEXT: andb $1, %al
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; X32-NEXT: negb %al
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; X32-NEXT: retl
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;
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; X64-LABEL: test1:
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; X64: ## %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: andb $1, %al
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; X64-NEXT: negb %al
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; X64-NEXT: ## kill: def $al killed $al killed $eax
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; X64-NEXT: retq
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%z = trunc i8 %x to i1
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%u = sext i1 %z to i8
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ret i8 %u
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}
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define i16 @test2(i16 %x) nounwind {
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; X32-LABEL: test2:
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; X32: ## %bb.0:
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; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: andb $1, %al
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; X32-NEXT: negb %al
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; X32-NEXT: movsbl %al, %eax
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; X32-NEXT: ## kill: def $ax killed $ax killed $eax
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; X32-NEXT: retl
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;
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; X64-LABEL: test2:
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; X64: ## %bb.0:
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; X64-NEXT: andb $1, %dil
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; X64-NEXT: negb %dil
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; X64-NEXT: movsbl %dil, %eax
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; X64-NEXT: ## kill: def $ax killed $ax killed $eax
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; X64-NEXT: retq
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%z = trunc i16 %x to i1
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%u = sext i1 %z to i16
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ret i16 %u
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}
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define i32 @test3(i32 %x) nounwind {
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; X32-LABEL: test3:
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; X32: ## %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: andb $1, %al
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; X32-NEXT: negb %al
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; X32-NEXT: movsbl %al, %eax
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; X32-NEXT: retl
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;
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; X64-LABEL: test3:
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; X64: ## %bb.0:
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; X64-NEXT: andb $1, %dil
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; X64-NEXT: negb %dil
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; X64-NEXT: movsbl %dil, %eax
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; X64-NEXT: retq
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%z = trunc i32 %x to i1
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%u = sext i1 %z to i32
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ret i32 %u
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}
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define i32 @test4(i32 %x) nounwind {
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; X32-LABEL: test4:
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; X32: ## %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: andb $1, %al
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; X32-NEXT: negb %al
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; X32-NEXT: movsbl %al, %eax
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; X32-NEXT: retl
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;
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; X64-LABEL: test4:
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; X64: ## %bb.0:
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; X64-NEXT: andb $1, %dil
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; X64-NEXT: negb %dil
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; X64-NEXT: movsbl %dil, %eax
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; X64-NEXT: retq
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%z = trunc i32 %x to i1
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%u = sext i1 %z to i32
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ret i32 %u
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}
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define i8 @test5(i8 %x) nounwind {
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; X32-LABEL: test5:
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; X32: ## %bb.0:
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; X32-NEXT: movb {{[0-9]+}}(%esp), %al
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; X32-NEXT: andb $1, %al
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; X32-NEXT: retl
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;
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; X64-LABEL: test5:
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; X64: ## %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: andb $1, %al
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; X64-NEXT: ## kill: def $al killed $al killed $eax
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; X64-NEXT: retq
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%z = trunc i8 %x to i1
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%u = zext i1 %z to i8
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ret i8 %u
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}
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define i16 @test6(i16 %x) nounwind {
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; X32-LABEL: test6:
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; X32: ## %bb.0:
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; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: andb $1, %al
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; X32-NEXT: movzbl %al, %eax
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; X32-NEXT: ## kill: def $ax killed $ax killed $eax
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; X32-NEXT: retl
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;
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; X64-LABEL: test6:
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; X64: ## %bb.0:
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; X64-NEXT: andb $1, %dil
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; X64-NEXT: movzbl %dil, %eax
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; X64-NEXT: ## kill: def $ax killed $ax killed $eax
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; X64-NEXT: retq
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%z = trunc i16 %x to i1
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%u = zext i1 %z to i16
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ret i16 %u
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}
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define i32 @test7(i32 %x) nounwind {
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; X32-LABEL: test7:
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; X32: ## %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: andb $1, %al
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; X32-NEXT: movzbl %al, %eax
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; X32-NEXT: retl
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;
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; X64-LABEL: test7:
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; X64: ## %bb.0:
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; X64-NEXT: andb $1, %dil
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; X64-NEXT: movzbl %dil, %eax
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; X64-NEXT: retq
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%z = trunc i32 %x to i1
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%u = zext i1 %z to i32
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ret i32 %u
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}
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define i32 @test8(i32 %x) nounwind {
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; X32-LABEL: test8:
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; X32: ## %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: andb $1, %al
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; X32-NEXT: movzbl %al, %eax
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; X32-NEXT: retl
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;
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; X64-LABEL: test8:
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; X64: ## %bb.0:
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; X64-NEXT: andb $1, %dil
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; X64-NEXT: movzbl %dil, %eax
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; X64-NEXT: retq
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%z = trunc i32 %x to i1
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%u = zext i1 %z to i32
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ret i32 %u
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}
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define i16 @test9(i8 %x) nounwind {
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; X32-LABEL: test9:
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; X32: ## %bb.0:
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; X32-NEXT: movsbl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: ## kill: def $ax killed $ax killed $eax
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; X32-NEXT: retl
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;
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; X64-LABEL: test9:
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; X64: ## %bb.0:
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; X64-NEXT: movsbl %dil, %eax
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; X64-NEXT: ## kill: def $ax killed $ax killed $eax
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; X64-NEXT: retq
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%u = sext i8 %x to i16
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ret i16 %u
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}
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define i32 @test10(i8 %x) nounwind {
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; X32-LABEL: test10:
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; X32: ## %bb.0:
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; X32-NEXT: movsbl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: retl
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;
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; X64-LABEL: test10:
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; X64: ## %bb.0:
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; X64-NEXT: movsbl %dil, %eax
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; X64-NEXT: retq
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%u = sext i8 %x to i32
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ret i32 %u
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}
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define i64 @test11(i8 %x) nounwind {
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; X32-LABEL: test11:
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; X32: ## %bb.0:
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; X32-NEXT: movsbl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl %eax, %edx
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; X32-NEXT: sarl $31, %edx
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; X32-NEXT: retl
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;
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; X64-LABEL: test11:
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; X64: ## %bb.0:
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; X64-NEXT: movsbq %dil, %rax
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; X64-NEXT: retq
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%u = sext i8 %x to i64
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ret i64 %u
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}
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define i16 @test12(i8 %x) nounwind {
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; X32-LABEL: test12:
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; X32: ## %bb.0:
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; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: ## kill: def $ax killed $ax killed $eax
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; X32-NEXT: retl
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;
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; X64-LABEL: test12:
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; X64: ## %bb.0:
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; X64-NEXT: movzbl %dil, %eax
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; X64-NEXT: ## kill: def $ax killed $ax killed $eax
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; X64-NEXT: retq
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%u = zext i8 %x to i16
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ret i16 %u
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}
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define i32 @test13(i8 %x) nounwind {
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; X32-LABEL: test13:
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; X32: ## %bb.0:
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; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: retl
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;
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; X64-LABEL: test13:
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; X64: ## %bb.0:
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; X64-NEXT: movzbl %dil, %eax
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; X64-NEXT: retq
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%u = zext i8 %x to i32
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ret i32 %u
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}
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define i64 @test14(i8 %x) nounwind {
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; X32-LABEL: test14:
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; X32: ## %bb.0:
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; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: xorl %edx, %edx
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; X32-NEXT: retl
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;
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; X64-LABEL: test14:
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; X64: ## %bb.0:
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; X64-NEXT: movzbl %dil, %eax
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; X64-NEXT: retq
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%u = zext i8 %x to i64
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ret i64 %u
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}
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define i32 @test15(i16 %x) nounwind {
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; X32-LABEL: test15:
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; X32: ## %bb.0:
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; X32-NEXT: movswl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: retl
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;
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; X64-LABEL: test15:
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; X64: ## %bb.0:
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; X64-NEXT: movswl %di, %eax
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; X64-NEXT: retq
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%u = sext i16 %x to i32
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ret i32 %u
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}
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define i64 @test16(i16 %x) nounwind {
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; X32-LABEL: test16:
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; X32: ## %bb.0:
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; X32-NEXT: movswl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl %eax, %edx
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; X32-NEXT: sarl $31, %edx
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; X32-NEXT: retl
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;
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; X64-LABEL: test16:
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; X64: ## %bb.0:
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; X64-NEXT: movswq %di, %rax
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; X64-NEXT: retq
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%u = sext i16 %x to i64
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ret i64 %u
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}
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define i32 @test17(i16 %x) nounwind {
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; X32-LABEL: test17:
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; X32: ## %bb.0:
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; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: retl
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;
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; X64-LABEL: test17:
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; X64: ## %bb.0:
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; X64-NEXT: movzwl %di, %eax
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; X64-NEXT: retq
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%u = zext i16 %x to i32
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ret i32 %u
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}
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define i64 @test18(i16 %x) nounwind {
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; X32-LABEL: test18:
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; X32: ## %bb.0:
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; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: xorl %edx, %edx
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; X32-NEXT: retl
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;
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; X64-LABEL: test18:
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; X64: ## %bb.0:
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; X64-NEXT: movzwl %di, %eax
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; X64-NEXT: retq
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%u = zext i16 %x to i64
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ret i64 %u
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}
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define i64 @test19(i32 %x) nounwind {
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; X32-LABEL: test19:
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; X32: ## %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl %eax, %edx
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; X32-NEXT: sarl $31, %edx
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; X32-NEXT: retl
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;
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; X64-LABEL: test19:
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; X64: ## %bb.0:
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; X64-NEXT: movslq %edi, %rax
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; X64-NEXT: retq
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%u = sext i32 %x to i64
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ret i64 %u
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}
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define i64 @test20(i32 %x) nounwind {
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; X32-LABEL: test20:
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; X32: ## %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: xorl %edx, %edx
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; X32-NEXT: retl
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;
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; X64-LABEL: test20:
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; X64: ## %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: retq
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%u = zext i32 %x to i64
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ret i64 %u
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}
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