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llvm-mirror/test/CodeGen/MIR/register-info.mir
Alex Lorenz e3d2250295 MIR Serialization: Serialize simple MachineRegisterInfo attributes.
This commit serializes the 3 scalar boolean attributes from the
MachineRegisterInfo class: IsSSA, TracksRegLiveness, and
TracksSubRegLiveness. These attributes are serialized as part
of the machine function YAML mapping.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10618

llvm-svn: 240579
2015-06-24 19:56:10 +00:00

37 lines
689 B
YAML

# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
# This test ensures that the MIR parser parses machine register info properties
# correctly.
--- |
define i32 @foo() {
entry:
ret i32 0
}
define i32 @bar() {
start:
ret i32 0
}
...
---
# CHECK: name: foo
# CHECK: isSSA: false
# CHECK-NEXT: tracksRegLiveness: false
# CHECK-NEXT: tracksSubRegLiveness: false
# CHECK: ...
name: foo
...
---
# CHECK: name: bar
# CHECK: isSSA: false
# CHECK-NEXT: tracksRegLiveness: true
# CHECK-NEXT: tracksSubRegLiveness: true
# CHECK: ...
name: bar
isSSA: false
tracksRegLiveness: true
tracksSubRegLiveness: true
...