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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-19 19:12:56 +02:00
llvm-mirror/test/CodeGen
Eli Bendersky 9d3cb5eed7 Add test to test/CodeGen/NVPTX for "alloca buffer" arguments.
Make sure such IR gets properly lowered to PTX.

llvm-svn: 204624
2014-03-24 16:52:30 +00:00
..
AArch64 [AArch64] Add SchedRW lists to NEON instructions. 2014-03-21 19:34:41 +00:00
ARM Fix test command line to avoid generating output file. 2014-03-21 07:20:29 +00:00
CPP
Generic CommandLine: Exit successfully for -version and -help 2014-02-28 19:08:01 +00:00
Hexagon Fix broken CHECK lines 2014-02-16 07:31:05 +00:00
Inputs
Mips [mips] Correct lowering of VECTOR_SHUFFLE to VSHF. 2014-03-21 16:56:51 +00:00
MSP430
NVPTX Add test to test/CodeGen/NVPTX for "alloca buffer" arguments. 2014-03-24 16:52:30 +00:00
PowerPC [PowerPC] Make use of VSX f64 <-> i64 conversion instructions 2014-03-23 05:35:00 +00:00
R600 R600/SI: Move instruction patterns to scalar versions. 2014-03-21 18:01:18 +00:00
SPARC Remove the linker_private and linker_private_weak linkages. 2014-03-13 23:18:37 +00:00
SystemZ [SystemZ] Add support for z196 float<->unsigned conversions 2014-03-21 10:56:30 +00:00
Thumb Add triples to try to fix the windows bots. 2014-02-13 16:49:47 +00:00
Thumb2 ARMv8 IfConversion must skip narrow instructions that a) define CPSR and b) wouldn't affect CPSR in an IT block 2014-02-26 11:27:28 +00:00
X86 WinCOFF: Add support for -ffunction-sections 2014-03-23 17:47:39 +00:00
XCore [XCore] Add support for the "m" inline asm constraint. 2014-03-06 16:37:48 +00:00