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8a9cdbd9d8
Assembler now permits pairs like 'v0:1', which are encoded differently from the odd-first pairs like 'v1:0'. The compiler will require more work to leverage these new register pairs.
16 lines
369 B
ArmAsm
16 lines
369 B
ArmAsm
# RUN: not llvm-mc -arch=hexagon -mcpu=hexagonv67 -mhvx -filetype=asm %s 2>%t; FileCheck --implicit-check-not="error:" %s <%t
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{
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v1:0 = #0
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v0:1 = #0
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}
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# CHECK: error: register `V1' modified more than once
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## Unused .tmp:
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{
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v1.tmp = vmem(r0 + #3)
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v0:1 = vaddw(v17:16, v17:16)
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}
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# CHECK: warning: register `V1' used with `.tmp' but not used in the same packet
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